封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | SBDIP |
| Pkg. Code: | H1K |
| Lead Count (#): | 20 |
| Pkg. Dimensions (mm): | 25.40 x 7.49 x 2.41 |
| Pitch (mm): | 2.54 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | Exempt |
| ECCN (US) | 9A515.e.1 |
| HTS (US) | 8542.39.0090 |
产品属性
| Pkg. Type | SBDIP |
| Lead Count (#) | 20 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pitch (mm) | 2.5 |
| Pkg. Dimensions (mm) | 25.4 x 7.5 x 2.41 |
| DLA SMD | 5962-95793 |
| Pb (Lead) Free | Exempt |
| Pb Free Category | Gold Plate over compliant Undercoat-e4 |
| MOQ | 25 |
| Temp. Range (°C) | -55 to +125°C |
| Length (mm) | 25.4 |
| Qualification Level | QML Class V (space) |
| Rating | Space |
| TID HDR (krad(Si)) | 200 |
| Thickness (mm) | 2.41 |
| Width (mm) | 7.5 |
有关 HCS374MS 的资源
描述
Support is limited to customers who have already adopted these products.
The Intersil HCS374MS is a Radiation Hardened non-inverting octal D-type, positive edge triggered flip-flop with three-stateable outputs. The HCS374MS utilizes advanced CMOS/SOS technology. The eight flip-flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). Data is also transferred to the outputs during this transition. The output enable (OE) controls the three-state outputs and is independent of the register operation. When the output enable is high, the outputs are in the high impedance state. The HCS374MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS374MS is supplied in a 20 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).