封装信息
| Pkg. Type: | SBDIP |
| Pkg. Code: | HVR |
| Lead Count (#): | 24 |
| Pkg. Dimensions (mm): | 30.48 x 15.11 x 2.41 |
| Pitch (mm): | 2.54 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | No |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | SBDIP |
| Lead Count (#) | 24 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | Not Applicable |
| Pb (Lead) Free | No |
| Pb Free Category | Hot Solder Dip |
| MOQ | 90 |
| Temp. Range (°C) | -55 to +125°C |
| CAGE code | 34371 |
| Die Sale Availability? | No |
| Flow | Harsh Environment & MIL-STD-883 |
| Length (mm) | 30.5 |
| PROTO Availability? | No |
| Pitch (mm) | 2.5 |
| Pkg. Dimensions (mm) | 30.5 x 15.1 x 2.41 |
| Qualification Level | Class Q |
| Rating | MIL-STD-883 |
| Thickness (mm) | 2.41 |
| Width (mm) | 15.1 |
有关 HM-6642/883 的资源
描述
The HM-6642/883 is a 512 x 8 CMOS NiCr fusible link Programmable Read Only Memory in the popular 24 pin, byte wide pinout. Synchronous circuit design techniques combine with CMOS processing to give this device High-Speed performance with very low power dissipation. On-chip address latches are provided, allowing easy interfacing with recent generation microprocessors that use multiplexed address/data bus structures, such as the 8085. The output enable controls, both active low and active high, further simplify microprocessor system interfacing by allowing output data bus control independent of the chip enable control. The data output latches allow the use of the HM-6642/883 in High-Speed pipelined architecture systems, and also in synchronous logic replacement functions. Applications for the HM-6642/883 CMOS PROM include low power hand held microprocessor based instrumentation and communications systems, remote data acquisition and processing systems, processor control store, and synchronous logic replacement. All bits are manufactured storing a logical "0" and can be selectively programmed for a logical "1" at any bit location.