特性
- Intel VR11.1 Compatible
- IMON Pin for Output Current Monitoring
- Power State Indicator (PSI#) Pin for Phase Dropping and Higher Efficiency During Light Load States
- CPURST_N Input to Eliminate Required Extensive External Circuit for proper PSI# Operation of Intel's Eaglelake Chipset Platform (ISL6333B, ISL6333C Only)
- Integrated Multi-Phase Power Conversion
- 3-Phase or 2-Phase Operation with Internal Drivers
- Precision Core Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.5% System Accuracy Over-Temperature
- Adjustable Reference-Voltage Offset
- Optimal Transient Response
- Active Pulse Positioning (APP) Modulation
- Adaptive Phase Alignment (APA)
- Fully Differential, Continuous DCR Current Sensing
- Integrated Programmable Current Sense Resistors
- Accurate Load Line Programming
- Precision Channel Current Balancing
- Gate Voltage Optimization Technology (ISL6333, ISL6333B Only)
- Power Saving Diode Emulation Mode (ISL6333, ISL6333B Only)
- Optimized for use with Coupled Inductors
- Variable Gate Drive Bias: +5V to +12V
- Microprocessor Voltage Identification Inputs
- 8-bit VID Input for Selecting VR11 DAC Voltages
- Dynamic VID Technology
- Dynamic VID Compensation
- Overcurrent Protection and Channel Current Limit
- Multi-tiered Overvoltage Protection
- Digital Soft-Start
- Selectable Operation Frequency up to 1.0MHz Per Phase
- Pb-free (RoHS Compliant)
描述
The ISL6333 three-phase PWM family of control ICs provide a precision voltage regulation system for advanced microprocessors. The integration of power MOSFET drivers into the controller IC marks a departure from the separate PWM controller and driver configuration of previous multi-phase product families. By reducing the number of external parts, this integration is optimized for a cost and space saving power management solution. The ISL6333 controllers are designed to be compatible with Intel VR11. 1 Applications. Features that make these controllers compatible include an IMON pin for output current monitoring, and a Power State Indicator (PSI#) pin for phase dropping and higher efficiency during light load states. An 8-bit VID input is used to select the desired output voltage from the VR11 DAC table. A circuit is provided for remote voltage sensing, compensating for any potential difference between remote and local grounds. The output voltage can also be positively or negatively offset through the use of a single external resistor. The ISL6333 controllers also include advanced control loop features for optimal transient response to load application and removal. One of these features is highly accurate, fully differential, continuous DCR current sensing for load line programming and channel current balance. Active Pulse Positioning (APP) Modulation and Adaptive Phase Alignment (APA) are two other unique features, allowing for quicker initial response to high di/dt load transients. With this quicker initial response to load transients, the number of output bulk capacitors can be reduced, helping to reduce cost. Integrated into the ISL6333 controllers are user-programmable current sense resistors, which require only a single external resistor to set their values. No external current sense resistors are required. Another unique feature of the ISL6333 controllers is the addition of a dynamic VID compensation pin that allows optimizing compensation to be added for well-controlled dynamic VID response. Protection features of these controller ICs include a set of sophisticated overvoltage, undervoltage, and overcurrent protection. Furthermore, the ISL6333 controllers include protection against an open circuit on the remote sensing inputs. Combined, these features provide advanced protection for the microprocessor and power system.
| Part Number | Status | Samples | Stock | RoHS | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|
| ISL6333CRZ | Obsolete | N/A | Out of Stock | Contact | QFN | 48# | Tube | No | 0 to +70°C | ||
| ISL6333CRZ-T | Obsolete | N/A | In Stock | Contact | QFN | 48# | Reel | No | 0 to +70°C | ||
| ISL6333IRZ | Obsolete | N/A | In Stock | RoHS:EN | QFN | 48# | Tube | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +85°C |
| ISL6333IRZ-T | Obsolete | N/A | Out of Stock | RoHS:EN | QFN | 48# | Reel | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +85°C |
- 产品变更通告英语PDF 326 KB 2021年5月21日
- 产品变更通告英语PDF 398 KB PCN15046 2016年1月07日
- EOL 通告英语PDF 219 KB PLC15047 2015年9月25日
- 产品变更通告英语PDF 145 KB PCN13063 2013年11月20日
- 产品变更通告英语PDF 243 KB PCN13024B 2013年10月25日
- 产品变更通告英语PDF 153 KB PCN11005 2011年1月14日
- 产品变更通告英语PDF 248 KB PCN10055 2010年6月30日
- 应用说明英语PDF 397 KB an1684 2004年1月19日AI 生成的摘要: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- 应用说明英语PDF 509 KB an1681 2004年1月19日AI 生成的摘要: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
- 应用说明英语PDF 709 KB an1620 2004年1月19日AI 生成的摘要: The document explains modeling and simulation techniques for VR11.1 voltage regulator design using iSim:PE. It covers capacitor modeling with C, ESR, and ESL parameters, load current waveform generation, and PCB parasitic resistance and inductance. The error amplifier and feedback compensation are modeled with specific voltage limits. The dual edge modulator uses Active Pulse Positioning for improved transient response. Current sense feedback maintains phase balance, droop control, and loop stability by sensing inductor current and applying gains based on phase count and resistor values. The complete circuit integrates all these blocks for accurate simulation.
- 数据手册英语PDF 1.91 MB isl6333-a-b-c 2000年10月03日
- 数据手册英语PDF 1.91 MB isl6333-a-b-c 2000年10月03日
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- 数据手册英语PDF 1.91 MB isl6333-a-b-c 2000年10月03日
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- 应用说明英语PDF 397 KB an1684 2004年1月19日AI 生成的摘要: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- 应用说明英语PDF 509 KB an1681 2004年1月19日AI 生成的摘要: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
- 应用说明英语PDF 709 KB an1620 2004年1月19日AI 生成的摘要: The document explains modeling and simulation techniques for VR11.1 voltage regulator design using iSim:PE. It covers capacitor modeling with C, ESR, and ESL parameters, load current waveform generation, and PCB parasitic resistance and inductance. The error amplifier and feedback compensation are modeled with specific voltage limits. The dual edge modulator uses Active Pulse Positioning for improved transient response. Current sense feedback maintains phase balance, droop control, and loop stability by sensing inductor current and applying gains based on phase count and resistor values. The complete circuit integrates all these blocks for accurate simulation.
应用说明和白皮书 (3)
- 产品变更通告英语PDF 326 KB 2021年5月21日
- 产品变更通告英语PDF 398 KB PCN15046 2016年1月07日
- EOL 通告英语PDF 219 KB PLC15047 2015年9月25日
- 产品变更通告英语PDF 145 KB PCN13063 2013年11月20日
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