ISL6506B

The ISL6506A and ISL6506B complement other power building blocks (voltage regulators) in ACPI-compliant designs for microprocessor and computer applications. They integrate the control of the 5V_DUAL and 3. 3V_DUAL rails into an 8 Ld EPAD SOIC package. The ISL6506A and ISL6506B's operating mode (active outputs or sleep outputs) is selectable through two digital control pins; S3 and S5. A completely integrated linear regulator generates the 3. 3VDUAL voltage plane from the ATX supply's 5V_SB output during sleep states (S3, S4/S5). In active states (during S0 and S1/S2), the ISL6506A and ISL6506B use an external N-Channel pass MOSFET to connect the outputs directly to the 3. 3V input supplied by an ATX power supply, for minimal losses. The ISL6506A and ISL6506B power up the 5V_DUAL plane by switching in the ATX 5V output through an NMOS transistor in active states, or by switching in the ATX 5VSB through a PMOS (or PNP) transistor in S3 sleep state. In S4/S5 sleep states, the ISL6506B 5VDUAL output is shut down. In the ISL6506A, the 5V_DUAL output stays on during S4/S5 sleep states. The ISL6506A and ISL6506B are functionally identical, except for the sleep mode in the preceding paragraph. In addition, the ISL6506A has a 1A current limit on the internal 3. 3V LDO; the ISL6506B has a 2A current limit.