特性
- High Efficiency: Up to 95%
- Fixed Frequency: 1MHz
- Operates From 3V to 5.5V Supply
- ±1% Reference
- Flexible Output Voltage Options
- Programmable 2-Bit VID Input
- Adjustable Output From 1V to 4.0V
- User-Partitioned Power Blocks
- Ultra-Compact DC/DC Converter Design
- PWMs Synchronized 180° Out-of-Phase
- Independent Enable Inputs and System Enable
- Stable All Ceramic Solutions
- Excellent Dynamic Response
- Independent Output Digital Soft-Start
- Power-Good Output Voltage Monitor
- Thermal-Overload Protection
- Overcurrent and Undervoltage Protection
- Pb-Free (RoHS Compliant)
描述
The ISL65426 is a high efficiency dual output monolithic synchronous buck converter operating over an input voltage range of 3V to 5. 5V. This single chip power solution provides two output voltages, which are selectable or externally adjustable from 1V to 80% of the supply voltage while delivering up to 6A of total output current. The two PWMs are synchronized 180° out-of-phase, reducing the RMS input current and ripple voltage. The ISL65426 switches at a fixed frequency of 1MHz and utilizes current-mode control with integrated compensation to minimize the size and number of external components and provide excellent transient response. The internal synchronous power switches are optimized for good thermal performance and high efficiency. A unique power block architecture allows partitioning of six 1A blocks to support one of four configuration options. One master power block is associated with each synchronous converter channel. Four floating slave power blocks allow the user to assign them to either channel. Proper external configuration of the power blocks is verified internally prior to soft-start initialization. Independent enable inputs allow for synchronization or sequencing soft-start intervals of the two converter channels. A third enable input allows additional sequencing for multi-input bias supply designs. Individual power-good indicators (PG1, PG2) signal when output voltage is within the regulation window. The ISL65426 integrates protection for both synchronous buck regulator channels. The fault conditions include overcurrent, undervoltage, and IC thermal monitor. High integration contained in a thin Quad Flat No-lead (QFN) package makes the ISL65426 an ideal choice to power many of today's small form factor applications. A single chip solution for large scale digital ICs, like field programmable gate arrays (FPGA), requiring separate core and I/O voltages.
应用
- FPGA, CPLD, DSP, and CPU Core and I/O Voltages Xilinx Spartan III, Virtex II, Virtex II Pro, Virtex 4 Altera Stratix, Stratix II, Cyclone, Cyclone II Actel Fusion, LatticeSC, LatticeEC
- Low-Voltage, High-Density Distributed Power Systems
- Point-of-Load Regulation
- Distributed Power Systems
- Set-Top Boxes
| Part Number | Status | Samples | Stock | RoHS | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free | Pb Free Category | Temp. Range (°C) |
|---|---|---|---|---|---|---|---|---|---|---|---|
| ISL65426HRZ | Obsolete | N/A | In Stock | RoHS:EN | QFN | 50# | Tube | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -10 to +100°C |
| ISL65426HRZ-T | Obsolete | N/A | Out of Stock | RoHS:EN | QFN | 50# | Reel | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -10 to +100°C |
| ISL65426IRZA | Obsolete | N/A | In Stock | RoHS:EN | QFN | 50# | Tube | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +85°C |
| ISL65426IRZA-T | Obsolete | N/A | Out of Stock | RoHS:EN | QFN | 50# | Reel | 3 | Yes | Pb-Free 100% Matte Tin Plate w/Anneal-e3 | -40 to +85°C |
- 应用说明英语PDF 592 KB an9208 2018年2月01日AI 生成的摘要: The document discusses high frequency power converters, focusing on ZVS-QRC and multi-resonant topologies that reduce switching losses by operating switches at zero voltage. It highlights challenges like EMI and high voltage stress. The SEPIC converter is introduced, explaining its ability to buck or boost voltage without polarity inversion. The document details SEPIC’s operating modes, voltage-current relationships, and the importance of inductor values for continuous or discontinuous conduction modes.
- 产品变更通告英语PDF 398 KB PCN15046 2016年1月07日
- 产品变更通告英语PDF 151 KB PCN13064 2013年11月21日
- 产品变更通告英语PDF 223 KB PCN13060 2013年10月30日
- 产品变更通告英语PDF 222 KB PCN13025B 2013年10月25日
- 产品变更通告英语PDF 248 KB PCN10055 2010年6月30日
- 应用说明英语PDF 397 KB an1684 2004年1月19日AI 生成的摘要: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- 应用说明英语PDF 509 KB an1681 2004年1月19日AI 生成的摘要: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
- 应用说明英语PDF 1.56 MB an1209 2004年1月19日AI 生成的摘要: The document details Intersil Integrated FET DC/DC converters, highlighting various models with their voltage ranges, output currents, switching frequencies, and package types. It explains the simplified buck regulator schematic, emphasizing ease of design with only four external components and internal FETs optimized for performance. Features include synchronous rectification for high efficiency, ceramic capacitor compatibility, small form factor, improved thermal performance, 100% duty cycle operation, internal loop compensation, external frequency synchronization for EMI reduction, and advanced control functions like UVLO, overcurrent, and thermal protection.
- 应用说明英语PDF 650 KB an9210 2001年12月21日AI 生成的摘要: This document presents a new PSPICE subcircuit model for power MOSFETs with global temperature options. It details synchronous rectifier circuit operation, including gate biasing and conduction modes. The model accurately simulates switching waveforms, diode recovery, and temperature-dependent efficiency. Measured and modeled data show excellent correlation for output characteristics, threshold voltage, breakdown voltage, and on-resistance across temperature ranges. Limitations in linear mode modeling are noted due to PSPICE assumptions.
- 应用说明英语PDF 387 KB an9209 1998年8月13日AI 生成的摘要: The document presents an empirical SPICE-2 subcircuit model for power MOSFETs, accurately simulating static and dynamic behaviors including first and third-quadrant operations and avalanche breakdown. The model aligns closely with measured data and is compatible with all SPICE versions without code modification. It uses parameters derived from datasheets or simple measurements. The document also includes detailed comparisons of measured and calculated curves for transfer, output, switching, and diode recovery characteristics. Additionally, it provides legal and usage disclaimers from Renesas Electronics.
- 应用说明英语PDF 349 KB an7244 1998年8月12日AI 生成的摘要: Power MOSFETs feature a positive temperature coefficient of resistance, enhancing stability and preventing thermal runaway by increasing resistance as temperature rises. Their gate terminals have extremely high input impedance with minimal leakage current, dominated by capacitive characteristics. Switching speed depends on gate resistance and capacitance, with polysilicon gates offering higher resistance and lower frequency operation than metal gates. MOSFETs require a gate-to-source voltage exceeding a threshold (around 2V) and typically about 10V to fully saturate and deliver maximum drain current. TTL and CMOS drivers differ in voltage capability and switching speed, often requiring buffering for optimal performance.
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- 应用说明英语PDF 592 KB an9208 2018年2月01日AI 生成的摘要: The document discusses high frequency power converters, focusing on ZVS-QRC and multi-resonant topologies that reduce switching losses by operating switches at zero voltage. It highlights challenges like EMI and high voltage stress. The SEPIC converter is introduced, explaining its ability to buck or boost voltage without polarity inversion. The document details SEPIC’s operating modes, voltage-current relationships, and the importance of inductor values for continuous or discontinuous conduction modes.
- 应用说明英语PDF 397 KB an1684 2004年1月19日AI 生成的摘要: The document outlines important legal disclaimers and usage guidelines for semiconductor products. It emphasizes user responsibility for product design and safety, disclaims liability for damages, and clarifies no intellectual property licenses are granted. Products are categorized by quality grades with specific application recommendations. Users must comply with laws, avoid unauthorized modifications, and ensure safe use within specified conditions. Contact details for Renesas Electronics sales offices worldwide are provided.
- 应用说明英语PDF 509 KB an1681 2004年1月19日AI 生成的摘要: The document explains grounding techniques for PCB layouts using a dual op amp example on a single-layer copper board. It compares three grounding schemes: a center spine ground trace, an outer ground plane, and a split/star ground plane, highlighting the benefits of single-point grounding to minimize noise and antenna effects. It emphasizes following current paths, minimizing loop lengths, and ensuring close forward and return paths to reduce interference. The document also includes disclaimers on product use, quality grades, safety, and legal compliance.
- 应用说明英语PDF 1.56 MB an1209 2004年1月19日AI 生成的摘要: The document details Intersil Integrated FET DC/DC converters, highlighting various models with their voltage ranges, output currents, switching frequencies, and package types. It explains the simplified buck regulator schematic, emphasizing ease of design with only four external components and internal FETs optimized for performance. Features include synchronous rectification for high efficiency, ceramic capacitor compatibility, small form factor, improved thermal performance, 100% duty cycle operation, internal loop compensation, external frequency synchronization for EMI reduction, and advanced control functions like UVLO, overcurrent, and thermal protection.
- 应用说明英语PDF 650 KB an9210 2001年12月21日AI 生成的摘要: This document presents a new PSPICE subcircuit model for power MOSFETs with global temperature options. It details synchronous rectifier circuit operation, including gate biasing and conduction modes. The model accurately simulates switching waveforms, diode recovery, and temperature-dependent efficiency. Measured and modeled data show excellent correlation for output characteristics, threshold voltage, breakdown voltage, and on-resistance across temperature ranges. Limitations in linear mode modeling are noted due to PSPICE assumptions.查看更多 (7)
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- 产品变更通告英语PDF 398 KB PCN15046 2016年1月07日
- 产品变更通告英语PDF 151 KB PCN13064 2013年11月21日
- 产品变更通告英语PDF 223 KB PCN13060 2013年10月30日
- 产品变更通告英语PDF 222 KB PCN13025B 2013年10月25日
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