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注意 - 建议使用以下设备作为替代品:
NRND - No Recommended Replacements Available - NRND
KAD5512P-50 is not recommended for new designs and has no alternative product available.

概览

描述

The KAD5512P-50 is a low-power, high performance, 12-bit, 500MSPS analog-to-digital converter designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process. The KAD5512P-50 is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS. The device utilizes two time-interleaved 12-bit, 250MSPS A/D cores to achieve the ultimate sample rate of 500MSPS. A single 500MHz conversion clock is presented to the converter, and all interleave clocking is managed internally. A Serial Peripheral Interface (SPI) port allows for extensive configurability, as well as fine control of matching characteristics (gain, offset, skew) between the two converter cores. These adjustments allow the user to minimize spurs associated with the interleaving process. Digital output data is presented in selectable LVDS or CMOS formats. The KAD5512P-50 is available in a 72 Ld QFN package with an exposed paddle. Performance is specified across the full industrial temperature range (-40°C to +85°C).

特性

  • Programmable gain, offset and skew control
  • 1.3GHz analog input bandwidth
  • 60fs clock jitter
  • Over-range indicator
  • Selectable clock divider: ÷1 or ÷2
  • Clock phase selection
  • Nap and sleep modes
  • Two's complement, gray code or binary data format
  • DDR LVDS-compatible or LVCMOS outputs
  • Programmable built-in test patterns
  • Single-supply 1.8V operation
  • Pb-free (RoHS compliant)
  • SNR = 65.9dBFS for fIN = 105MHz (-1dBFS)
  • SFDR = 82.0dBc for fIN = 105MHz (-1dBFS)
  • Total power consumption = 432mW

产品对比

应用

文档

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软件与工具

软件下载

类型 文档标题 日期
PCB 设计文件 PDF 483 KB
PCB 设计文件 PDF 959 KB
软件和工具 - 软件 EXE 162.95 MB
PCB 设计文件 ZIP 4.49 MB
软件和工具 - 软件 EXE 1.00 MB
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Diagram of ECAD Models

模型

类型 文档标题 日期
模型 - IBIS IBS 138 KB
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