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VCSO Based Clock PLL with Autoswitch Function

封装信息

Pkg. Type:CLCC
Pkg. Code:CG36
Lead Count (#):36
Pkg. Dimensions (mm):9.0 x 9.0 x 2.8
Pitch (mm):0.6

环境和出口类别

Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
Moisture Sensitivity Level (MSL)1

产品属性

Pkg. TypeCLCC
Lead Count (#)36
Pb (Lead) FreeYes
Carrier TypeTube
Common Input Freq (MHz)38.88MHz, 77.76MHz, 155.52MHz, 622.08MHz
Core Voltage (V)3.3
Diff. Input Signaling3.3
Diff. Output Signaling3.3
Divider Value1, 2
Feedback Divider1 - 1, 2 - 2, 4 - 4, 8 - 8, 16 - 16, 32 - 32, 64 - 64, 128 - 128, 256 - 256
FunctionFrequency Translation, Jitter Attenuation with Autoswitch Function
Hitless ProtectionYes
I/O Voltage (V)3.3 - 3.3
Input Freq (MHz)15 - 700
Input TypeLVPECL, LVDS
Inputs (#)2
Length (mm)9
M/R Look-Up TableYes
MOQ57
Moisture Sensitivity Level (MSL)1
Operating Freq155.52
Output Banks (#)1
Output Freq Range (MHz)62.5 - 175
Output SignalingLVPECL
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)1
Package Area (mm²)81
Pb Free Categorye4 Au
Phase Jitter Max RMS (ps)0.6
Phase Jitter Typ RMS (ps)0.4
Pitch (mm)0.6
Pkg. Dimensions (mm)9.0 x 9.0 x 2.8
Qty. per Carrier (#)54
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Supply Voltage (V)3.3 - 3.3
Tape & ReelNo
Temp. Range (°C)0 to 70°C
Thickness (mm)2.8
Width (mm)9

描述

The M1026 is a Voltage Controlled SAW Oscillator (VCSO) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting up to 2.5Gb data rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode. The M1026 module includes a proprietary Surface Acoustic Wave (SAW) delay line as part of the VCSO. This results in a high-frequency, high-Q, low phase noise oscillator that assures low intrinsic output jitter.