跳转到主要内容
瑞萨电子 (Renesas Electronics Corporation)

瑞萨电子的时序产品组合已被 SiTime 收购。

数据手册、文档以及样品订购仍将通过 Renesas.com 官网提供,直至 2026 年底。如需新设计、采购、技术支持以及产品咨询,请访问 SiTime.com 官网或发送电子邮件至 [email protected]。预计于 2026 年底前全面过渡至 SiTime。

Frequency Translation PLL

封装信息

Pkg. Type:CLCC
Pkg. Code:CG36
Lead Count (#):36
Pkg. Dimensions (mm):9.0 x 9.0 x 2.8
Pitch (mm):0.6

环境和出口类别

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)1
ECCN (US)
HTS (US)

产品属性

Pkg. TypeCLCC
Lead Count (#)36
Pb (Lead) FreeYes
Carrier TypeTube
Abs. Pull Range Min. (± PPM)120
Core Voltage (V)3.3
Feedback InputNo
Input Freq (MHz)1 - 175
Input TypeLVCMOS
Inputs (#)2
Length (mm)9
MOQ57
Moisture Sensitivity Level (MSL)1
Output Banks (#)1
Output Freq Range (MHz)78.125 - 78.125, 156.25 - 156.25, 312.5 - 312.5, 625 - 625
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)1
Package Area (mm²)81
Pb Free Categorye4 Au
Phase Jitter Typ RMS (ps)0.5
Pitch (mm)0.6
Pkg. Dimensions (mm)9.0 x 9.0 x 2.8
Prog. ClockNo
Qty. per Carrier (#)54
Qty. per Reel (#)0
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Temp. Range (°C)0 to 70°C
Thickness (mm)2.8
Width (mm)9

描述

The M2004-01 is a Voltage Controlled SAW Oscillator (VCSO) based clock generator PLL designed for clock frequency translation and jitter attenuation in a high-speed data communications system. The clock multiplication ratio and output divider ratio are pin selectable and also configurable through serial programming. External loop components allow the tailoring of the PLL loop response.