RA 可扩展性强的配置软件包 (FSP)

For additional information and links, go to GitHub.

v6.5.0

Release Notes

Flexible Software Package (FSP) for Renesas RA MCU Family, version 6.5.0.

Minimum e² studio version for FSP 6.5.0 is e² studio 2026-04.2

Download the FSP with e² studio Windows installer for this release, setup_fsp_v6_5_0_e2s_v2026-04.2.exe, from here.

Download the FSP with e² studio Linux installer for this release, setup_fsp_v6_5_0_e2s_v2026-04.2.xz.run, from here. Refer to installation steps for information on installing e² studio and related software components in a Linux PC.

Download the FSP with e² studio macOS (Apple Silicon) installer for this release, setup_fsp_v6_5_0_e2s_v2026-04.2.pkg, from here. Refer to installation steps for information on installing e² studio and related software components in a macOS PC.

If you are using IAR or Keil MDK, download the Renesas Advanced Smart Configurator for your operating system.

• For Windows download: FSP RASC Windows Installer
• For Linux download: FSP RASC Linux Installer
• For Mac OS (Apple Silicon) download: FSP RASC macOS Installer

Post - FSP v6.5.0 changes to toolchain support

Future releases of FSP will no longer ship with the GCC toolchain integrated within the combined e² studio/FSP platform installer. The use of the GCC toolchain with FSP will still be supported, and an option in the platform installer will allow GCC to be downloaded from the internet and installed as part of the overall install process. Alternatively, it is possible to link e² studio to an installation of the GCC toolchain already on the user's computer.

Note: The LLVM toolchain/Arm Toolchain for Embedded (ATfE) will continue to be integrated within the e² studio/FSP platform installer.

With FSP 6.3.0 and later, when using the LLVM toolchain the compiler optimization level is set to -Os by default for RA4/RA6/RA8 MCUs, whereas previous FSP's would use -O2. This has been done as with LLVM, -Os causes a balance of optimizations similar to GCC's -O2 option.

Note that for RA0/RA2 MCUs, where keeping memory size to a minimum is typically of primary importance, the -Oz optimization level is selected by default.

All installers are available in the Assets section of this release.

Refer to the https://github.com/renesas/fsp/blob/master/README.md "README.md" in the FSP root folder for setup instructions, hardware details, and related links.

New Features

• MCUboot Solution Template Enhancements:
  • Single‑Image MCUboot Templates:
    • Added MCUboot single image solution template for RA6 CM4 devices (RA6M1, RA6T1, RA6M2, RA6M3) using mbedtls
    • Added MCUboot single image solution template for cm33 devices (RA6M4, RA6M5, RA4M2, RA4M3) using mbedtls with crypto accelerator
    • Added MCUboot single image solution template for cm33 devices (RA6M4, RA6M5, RA6E1, RA4M2, RA4M3, RA4E1) using mbedtls with crypto accelerator
    • Added MCUboot single image solution template for CM85 devices using mbedtls with crypto accelerator
  • MCUboot with MMF (Mirrored Memory Flash) Support:
    • Added MCUboot single image solution template in MMF mode for RA6 CM4 devices (RA6M1, RA6T1, RA6M2, RA6M3) using mbedtls
    • Added MCUboot single image solution template in MMF mode for RA2A2 using mbedtls
  • Multi‑Image MCUboot Templates:
    • Added MCUboot multi-image image solution template in Overwrite mode for CM85 devices (RA8P1, RA8D2, RA8M2, RA8T2) using mbedtls
• Middleware and Feature Additions:
  • Added support for Host USB Video Class (HUVC) driver
  • Updated LVGL graphic library to version v9.5.0
  • Added support for LwIP SNMP application
  • Added link detection support for all RMAC port from r_layer3_switch
• New Board and Package Support:
  • Added support for EK-RA8P1, EK-RA8M2, EK-RA8D2 V2 board
  • Updated FSP pin configuration support for:
    • RA8M1, RA8M2 and RA8T1 (169‑BGA package)
    • RA4L1 (72-WLCSP package)
    • RA0E1 (20-TSSOP package):
      • Removed the sub-clock and its pins from FSP clock configuration and pin configuration
      • Initialized the sub-clock related registers per TU
• Cryptography and Security Updates:
  • Added HMAC-SHA3 224/256/384/512 feature for RSIP-E50D
  • Added xDLMS InitiateRequest message decryption feature for RSIP-E11A
• Updated to MbedTLS version 3.6.6

Fixes and Improvements

• Added support to disable the TAU_PWM master-channel interrupt
• OFS register ZHUK is placed after PBPS
• Fixed the issue where the IPV settings are not applied to the VLAN and Layer 3 entries
• Support MAC table searches by source MAC address, destination MAC address, or both
• Added support of lwIP PPP configuration
• Updated the CCD setting description in r_ioport to notify users to enable CCD support when using CCD pins
• Improved CTSU2 diagnosis feature in r_ctsu
• Fixed issues in CTSU2 CCO correction for devices with certain characteristics (announced in R20TS1229EJ0100), and CTSU1 CCO correction for RA4M2 and RA4M3
• Fixed MPU region size check to avoid configuring zero size regions when D-Cache is enabled for RA8 devices
• RSIP Protected Mode driver improvements:
  • Reduced code size for RSIP-E51A and RSIP-E50D PM drivers
  • Updated control procedures for RSIP-E11A PM driver to code size reduction version
  • Updated CAVP certified module for RSIP-E31A PM driver due to re-acquisition of CAVP certification
  • Bugs fixed:
    • Buffer size of cert info and wrapped secret was not defined correctly when using brainpool curve
    • Buffer size of input message was not defined correctly when using KDF-SHA 512
• Updated PQC-Lib V2.00 with stack overflow bug fix
• Fixed incorrect bit length for SCE9 PSA Crypto wrapped keys
• Updated description for RAMP in MDF
• Fixed link bug r_ether with ICS1894 PHY
• Updated IAR toolchain to v9.70.4
• Fixed build error when user custom PHY function is used on ESWM
• Fixed rm_motor_control callback issue when 2 motors are enabled
• rm_motor_pm_foc module:
  • Fixed a unit typo where degree values were assigned to variables intended to be in radians
  • Optimized the sine and cosine calculations in the transform function within the current control loop of rm_motor_pm_foc_inner
  • Fixed typos in rm_motor_pm_foc.h:
    • Renamed p_to_outer_active to p_to_inner_active in the outer module
    • Renamed p_to_outer_copy to p_to_inner_copy in the outer module
• rm_motor_sensor module:
  • Fixed a unit typo where degree values were stored in variables intended for radians
  • Fixed an issue where the sign of e_q inverted during deceleration, causing a loss of value continuity and resulting in incorrect angle integration
• Added D-Cache enabled support for RA8 devices for below modules:
  • DTC: Review DTC documentation for details
  • SPI_B: Review SPI_B documentation for details
  • SCI_B_SPI: Review SCI_B_SPI documentation for details
  • SCI_B_UART: Review SCI_B_UART documentation for details
• Corrected the copyright notice errors in the CAVP module source files for RSIP-E31A
• Improved rm_psa_crypto SHA-256 code to handle message lengths that are multiples of 128 bytes
• Updated workaround document for e² studio 2026-04 pin configuration tooling
• Updated the BSP usage notes and Cortex-M85 cache document with information relevant to DTC driver D-Cache support
• Fixed an error in the macro definitions that specify the sizes of the key buffer for SCE9 Key Injection
• Fixed pin output support enable when using the compare match feature
• LVGL updates:
  • Enabled runtime control of the GPU (enable/disable)
  • Fixed the screen lock issue when using Dave2D
  • Set LV_USE_OBJ_NAME to enabled by default
• Fixed D-Cache enable and warmstart post-initialization call sequence in SystemInit()
• Corrected maximum configurable bitrate for R_SPI_B
• Updated procedures for RSIP-E51A
• ThreadX projects no longer globally disable GCC sign conversion warnings
• Fixed WDT security attribution not set in secure project in RA8x2

Known Issues

• Solution Projects (TrustZone, Multicore):
  • There are issues related to pin configuration in e² studio 2026-04.2. Refer to this document for workarounds
• RA0x devices:
  • HS400x and ZMOD4xxx sensors cannot be used on RA0E1
  • FS3000 sensor does not support SAU-I2C driver
• Selecting 'Safely Remove Hardware and Eject Media' on Windows and eject the mass storage (PMSC), when using USBX composite device (PCDC+PMSC), the Windows Explorer for PMSC does not disappear.
• PMSC may not work properly when USBX Composite Device (PCDC+PMSC) is connected to a specific Linux OS (USB Host).
• EWARM version 9.70.4 does not contain support for RA0E3. To develop with IAR for these devices, it is necessary to install a support patch file, which can be downloaded by EWARM v9.70.4 users from the IAR MyPages system
  • RA0E3 (arm_Renesas_RA0E3_20260106_1.zip)
• When importing projects in e² studio that were created using a previous toolchain version, be sure that the version specified in the project is integrated (Window->Preferences->Renesas->Renesas Toolchain Integration) or select the appropriate toolchain version if upgrading the project to a later FSP version.
• When upgrading RA6T2 projects to FSP 6.4.0, the GTETRGx pin assignments might be lost. Please re-assign the pins manually.
• When upgrading RA0E1/E2/L1 projects to FSP 6.4.0, the SAU_SPI00 pin group might be changed; please restore the pin group manually.
• For known issues in the tools, please refer to the respective tool's release notes e² studio RN.
• Updated rm_psa_cryto header to allow using the functions in a CPP project

Visit GitHub Issues for this project.