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2SJ606

过时

Pch Single Power Mosfet -60V -83A 15Mohm Mp-25/To-220Ab

特性

  • Super low on-state resistance:
    RDS(on)1 = 15 mΩ MAX. (VGS = −10 V, ID = −42 A)
    RDS(on)2 = 23 mΩ MAX. (VGS = −4.0 V, ID = −42 A)
  • Low input capacitance:
    Ciss = 4800 pF TYP. (VDS = −10 V, VGS = 0 V)
  • Built-in gate protection diode
查找功率 MOSFET的其他产品

描述

The 2SJ606 is a Pch Single Power Mosfet -60V -83A 15Mohm Mp-25/To-220Ab.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Pb (Lead) Free
2SJ606-AZObsoleteN/AOut of StockMP-253#BagYes
2SJ606-Z-E2-AZObsoleteN/AOut of StockMP-253#Embossed Tape1Yes
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筛选

    推荐文档 (1)

  1. 数据手册
    英语
    2SJ606 Data Sheet
    RECOMMENDED
    PDF 208 KB D14654EJ3V0DS00 2002年7月01日

    数据手册 (1)

  1. 数据手册
    英语
    2SJ606 Data Sheet
    RECOMMENDED
    PDF 208 KB D14654EJ3V0DS00 2002年7月01日

    手册和指南 (1)

  1. 指南
    英语
    Recommended Mounting Pad for Renesas Power MOSFETs
    PDF 988 KB R07ZZ0016EJ0100 Rev.1.00 2025年12月03日
    The diagrams in this document show the recommended mounting pad layout dimensions for Renesas Power MOSFETs. In actual PCB design, optimization should consider mounting density, mountability, dimensional tolerances, and other relevant factors.

    应用说明和白皮书 (3)

  1. 应用说明
    英语
    Power MOSFETs TOLL and TOLT Comparison of Thermal Performance
    PDF 596 KB R07AN0051EJ0100 Rev.1.00 2026年4月27日
    Compares the thermal performance of automotive power MOSFETs in the TOLL (TO-Leadless) package and its derivatives, including the TOLT (TO-Leaded Top-side Cooling) package. The information presented in this document is intended to serve as a comprehensive guideline for designing high-power automotive systems.
  2. 应用说明
    英语
    Power MOSFETs: How Does the Frequency Affect Capacitance Measurement?
    PDF 936 KB R07AN0050EJ0100 Rev.1.00 2025年12月03日
    Measurement frequency and the influence of parasitic inductance are crucial in capacitance measurements for Power MOSFETs. Split-gate structures, with their low Crss and higher Ciss, face challenges from parasitic inductance, making high-frequency measurements difficult. In contrast, standard-gate trench structures allow relatively accurate results. The influence of parasitic inductance in actual measurements is examined from various perspectives.
  3. 应用说明
    英语
    Attention of Handling Semiconductor Devices
    PDF 648 KB R07ZZ0010EJ0602 Rev.6.02 日本語 2021年4月16日
    AI 生成的摘要: The document outlines derating standards for Power MOSFETs and IGBTs, emphasizing temperature, humidity, voltage, current, and power limits to ensure device reliability. It discusses package type selection between hermetic sealed and plastic molded types, highlighting the advantages of surface-mount packages for miniaturization. It also details precautions for physical handling, including proper lead forming, cutting, and mounting techniques to prevent stress and damage during installation.

    其他 (2)

  1. 其他
    中文
    功率MOS FET 功率MOS FET使用时的注意事项
    PDF 1.6 MB RCJ27G0016-0100 Rev.1.00 2008年2月07日
  2. 其他
    中文
    功率MOS FET 应用例子
    PDF 721 KB RCJ27G0013-0100 Rev.1.00 2008年2月07日
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筛选

模拟模型

    模拟模型 (1)

  1. 模型 - SPICE
    英语
    2SJ606 SPICE Data
    ZIP 2018年8月06日
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