特性
- Extremely low skew outputs (50 ps maximum)
- Packaged in 8-pin SOIC
- Available in Pb (lead) free package
- Low power CMOS technology
- Operating voltages of 2.5 V to 5 V
- Output Enable pin tri-states outputs
- 5 V tolerant input clock
- Industrial temperature range
524 - Block Diagram
描述
The 524 is a low skew, single input to four output, clock buffer. Part of Renesas' ClockBlocks™ family, this is our lowest skew, small clock buffer. See the 552-02 for a 1 to 8 low skew buffer. For more than eight outputs, see the MK74CBxxx Buffalo™ series of clock drivers. Renesas makes many non-PLL and PLL based low skew output devices as well as Zero Delay Buffers to synchronize clocks. Contact us for all of your clocking needs.
产品参数
| 属性 | 值 |
|---|---|
| Temp. Range (°C) | -40 to 85°C |
| Product Category | Clock Buffers & Drivers |
封装选项
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| SOIC | 4.9 x 3.9 x 1.5 | 8 | 1.27 |
支持社区
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