瑞萨电子的时序产品组合已被 SiTime 收购。
数据手册、文档以及样品订购仍将通过 Renesas.com 官网提供,直至 2026 年底。如需新设计、采购、技术支持以及产品咨询,请访问 SiTime.com 官网或发送电子邮件至 [email protected]。预计于 2026 年底前全面过渡至 SiTime。
| CAD 模型: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG16 |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 5.0 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Lead Count (#) | 16 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 96 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Accepts Spread Spec Input | Yes |
| App Jitter Compliance | PCIe Gen1 |
| Architecture | Common |
| Core Voltage (V) | 3.3 |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 2 |
| Diff. Output Signaling | HCSL |
| Diff. Outputs | 1 |
| Diff. Termination Resistors | 4 |
| Function | Multiplexer |
| Input Freq (MHz) | 200 |
| Input Type | HCSL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 192 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 200 |
| Output Type | HCSL, LVDS |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 1 |
| PLL | No |
| Package Area (mm²) | 22 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 5.0 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Power Consumption Typ (mW) | 132 |
| Product Category | Clock Multiplexers, PCI Express Clocks |
| Prog. Clock | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
The 557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) input pairs and fans out to one pair of differential HCSL or LVDS outputs. This chip is suited especially for PCI-Express applications, where there is a need to select the PCI-Express clock either locally from the PCI-E card or from the motherboard.