瑞萨电子 (Renesas Electronics Corporation)
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557-08

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2:1 Multiplexer Chip For PCI-Express GEN1

注意 - 建议使用以下设备作为替代品：
9DML04 - 2:4 3.3V PCIe Gen 1–7 Clock Mux

特性

  • Packaged in 16-pin TSSOP
  • Pb (lead) free package
  • Operating voltage of 3.3 V
  • Low power consumption
  • Input clock frequency of up to 200 MHz
查找时钟多路复用器(MUX)的其他产品
557-08 - Block Diagram
557-08 - Pinout
557-08 - Block Diagram
557-08 - Pinout

描述

The 557-08 is a 2:1 multiplexer chip that allows the user to select one of the two HCSL (Host Clock Signal Level) input pairs and fans out to one pair of differential HCSL or LVDS outputs. This chip is suited especially for PCI-Express applications, where there is a need to select the PCI-Express clock either locally from the PCI-E card or from the motherboard.

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This is the first video in our PCIe series. In this video, we define PCIe architectures, focusing on common and separate clock architectures. Watch the rest of the video series below where Ron will cover the impact of different timing architectures.

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