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1.8V to 3.3V 1:4 Crystal Input to LVCMOS Output High-Performance Clock Fanout Buffer with OE

封装信息

CAD 模型:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG16
Lead Count (#):16
Pkg. Dimensions (mm):5.0 x 4.4 x 1.0
Pitch (mm):0.65

环境和出口类别

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)16
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Package Area (mm²)22
Pitch (mm)0.65
Pkg. Dimensions (mm)5.0 x 4.4 x 1.0
Qty. per Carrier (#)96
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 105°C
Country of AssemblyTAIWAN
Country of Wafer FabricationTAIWAN
Additive Phase Jitter Typ RMS (fs)50
Core Voltage (V)1.8V, 2.5V, 3.3V
FunctionBuffer
Input Freq (MHz)200
Input TypeCrystal, LVCMOS
Inputs (#)1
Length (mm)5
MOQ288
Output Banks (#)1
Output Freq Range (MHz)200
Output SignalingLVCMOS
Output Skew (ps)65
Output TypeLVCMOS
Output Voltage (V)1.8V, 2.5V, 3.3V
Outputs (#)4
Pkg. TypeTSSOP
Price (USD)$2.39976
Product CategoryClock Buffers & Drivers
Reference OutputYes
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumNo
Tape & ReelNo
Thickness (mm)1
Width (mm)4.4

描述

The 5P83904 is a high-performance, 1-to-4 crystal input to LVCMOS fanout buffer with output enable pins. This device accepts a fundamental mode crystal from 10MHz to 40MHz and outputs LVCMOS clocks with best-in-class phase noise performance.

The 5P83904 features a synchronous glitch-free Output Enable function to eliminate any intermediate incorrect output clock cycles when enabling or disabling outputs. It comes in standard TSSOP packages or small QFN packages and can operate from 1.8V to 3.3V supplies.