跳转到主要内容
1.8V to 3.3V 1:6 Crystal Input to LVCMOS Output High-Performance Clock Fanout Buffer with OE

封装信息

CAD 模型:View CAD Model
Pkg. Type:COL
Pkg. Code:CMG16
Lead Count (#):16
Pkg. Dimensions (mm):2.5 x 2.5 x 0.5
Pitch (mm):0.4

环境和出口类别

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)16
Carrier TypeReel
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)4000
Package Area (mm²)6.3
Pitch (mm)0.4
Pkg. Dimensions (mm)2.5 x 2.5 x 0.5
Reel Size (in)7
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 105°C
Country of AssemblyMALAYSIA
Country of Wafer FabricationTAIWAN
Additive Phase Jitter Typ RMS (fs)50
Core Voltage (V)1.8V, 2.5V, 3.3V
FunctionBuffer
Input Freq (MHz)200
Input TypeCrystal, LVCMOS
Inputs (#)1
Length (mm)2.5
MOQ4000
Output Banks (#)1
Output Freq Range (MHz)200
Output SignalingLVCMOS
Output Skew (ps)65
Output TypeLVCMOS
Output Voltage (V)1.8V, 2.5V, 3.3V
Outputs (#)6
Pkg. TypeCOL
Reference OutputYes
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumNo
Tape & ReelYes
Thickness (mm)0.5
Width (mm)2.5
已发布No

描述

The 5P83905 is a high-performance, 1-to-6 crystal input to LVCMOS fanout buffer with Output Enable (OE) pins. This device accepts a fundamental mode crystal from 10MHz to 40MHz and outputs LVCMOS clocks with best-in-class phase noise performance.

The 5P83905 features a synchronous glitch-free Output Enable function to eliminate any intermediate incorrect output clock cycles when enabling or disabling outputs. It comes in standard TSSOP packages or small QFN packages and can operate from 1.8V to 3.3V supplies.