封装信息
| Pkg. Type: | TQFP |
| Pkg. Code: | PPG44 |
| Lead Count (#): | 44 |
| Pkg. Dimensions (mm): | 10.0 x 10.0 x 1.4 |
| Pitch (mm): | 0.8 |
环境和出口类别
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
| Moisture Sensitivity Level (MSL) | 3 |
产品属性
| Pkg. Type | TQFP |
| Lead Count (#) | 44 |
| Pb (Lead) Free | Yes |
| Carrier Type | Reel |
| Length (mm) | 10 |
| MOQ | 1250 |
| Moisture Sensitivity Level (MSL) | 3 |
| Package Area (mm²) | 100 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 0.8 |
| Pkg. Dimensions (mm) | 10.0 x 10.0 x 1.4 |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 500 |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | Yes |
| Temp. Range (°C) | -40 to 85°C |
| Thickness (mm) | 1.4 |
| Width (mm) | 10 |
有关 5T995 的资源
描述
The 5T995 is a high fanout 2.5V PLL based clock driver intended for high performance computing and data communications applications. A key feature of the programmable skew is the ability of outputs to lead or lag the REF input signal. The 5T995 has eight programmable skew outputs in four banks of 2. Skew is controlled by 3-level input signals that may be hard-wired to appropriate high-mid-low levels. The feedback input allows divide-by-functionality from 1 to 12 through the use of the DS[1:0] inputs. This provides the user with frequency multiplication from 1 to 12 without using divided outputs for feedback. When the sOE pin is held low, all the outputs are synchronously enabled. However, if sOE is held high, all the outputs except 2Q0 and 2Q1 are synchronously disabled. The LOCK output asserts to indicate when Phase Lock has been achieved. Furthermore, when PE is held high, all the outputs are synchronized with the positive edge of the REF clock input. When PE is held low, all the outputs are synchronized with the negative edge of REF. The 5T995 has LVTTL outputs with 12mA balanced drive outputs.