特性
- Packaged in 16-pin TSSOP
- Pb (lead) free package, RoHS compliant
- Clock or crystal input
- Low phase noise
- Low jitter
- Exact (0 ppm) multiplication ratios
- Reference clock output available
- Support for 256, 384, 512, and 768 times sampling rate
661 - Block Diagram
描述
The 661 provides synchronous clock generation for audio sampling clock rates derived from an MPEG stream, or can be used as a standalone clock source with a 27 MHz crystal. The device uses the latest PLL technology to provide excellent phase noise and long term jitter performance for superior synchronization and S/N ratio. Please contact IDT if you have a requirement for an input and output frequency not included here - we can rapidly modify this product to meet special requirements.
支持社区
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DA14699 emwin_demo
您好: 目前在emwin的使用上遇到了幾個問題 設備 : DA1469x PRO kit + DA14699 daughterboard lcd 240*240 lcd 1.5吋 控制晶片為 : ST7789V2 SDK : SDK_10.0.10.118 smartsnippetsstudio2.0.14.1748 有修改 ...
2020年11月17日
