Lead Count (#) | 16 |
Pkg. Code | DCG16 |
Pitch (mm) | 1.27 |
Pkg. Type | SOIC |
Pkg. Dimensions (mm) | 9.9 x 3.9 x 1.5 |
Moisture Sensitivity Level (MSL) | 3 |
Pb (Lead) Free | Yes |
ECCN (US) | NLR |
HTS (US) | 8542390001 |
Lead Count (#) | 16 |
Carrier Type | Tube |
Moisture Sensitivity Level (MSL) | 3 |
Qty. per Reel (#) | 0 |
Qty. per Carrier (#) | 48 |
Pb (Lead) Free | Yes |
Pb Free Category | e3 Sn |
Temp. Range | -40 to +85°C |
Accepts Spread Spec Input | No |
Core Voltage (V) | 3.3, 5 |
Die Form | No |
Input Freq (MHz) | 5 - 160 |
Input Type | LVCMOS |
Inputs (#) | 1 |
Length (mm) | 9.9 |
MOQ | 144 |
Output Banks (#) | 2 |
Output Freq Range (MHz) | 24 - 160 |
Output Skew (ps) | 100 |
Output Type | LVCMOS |
Output Voltage (V) | 3.3, 5 |
Outputs (#) | 2 |
Package Area (mm²) | 38.6 |
Period Jitter Typ P-P (ps) | 90.000 |
Pitch (mm) | 1.27 |
Pkg. Dimensions (mm) | 9.9 x 3.9 x 1.5 |
Pkg. Type | SOIC |
Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
Tape & Reel | No |
Thickness (mm) | 1.5 |
Width (mm) | 3.9 |
The 670-01 is a high speed, low phase noise, Zero Delay Buffer (ZDB) which integrates IDT's proprietary analog/digital Phase Locked Loop (PLL) techniques. Part of IDT's ClockBlocks™ family, the part's zero delay feature means that the rising edge of the input clock aligns with the rising edges of the outputs giving the appearance of no delay through the device. There are two identical outputs on the chip. The FBCLK should be used to connect to the FBIN. Each output has its own output enable pin. The 670-01 is ideal for synchronizing outputs in a large variety of systems, from personal computers to data communications to video. By allowing off chip feedback paths, the chip can eliminate the delay through other devices. The 15 different on-chip multipliers work in a variety of applications.