封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | PLCC |
| Pkg. Code: | PLG52 |
| Lead Count (#): | 52 |
| Pkg. Dimensions (mm): | 19.0 x 19.0 x 3.63 |
| Pitch (mm): | 1.27 |
环境和出口类别
| Pb (Lead) Free | Yes |
| Moisture Sensitivity Level (MSL) | 3 |
| ECCN (US) | |
| HTS (US) |
产品属性
| Lead Count (#) | 52 |
| Pb (Lead) Free | Yes |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| Access Time (ns) | 12 |
| Architecture | Dual-Port |
| Bus Width (bits) | 9 |
| Core Voltage (V) | 5 |
| Density (Kb) | 36 |
| I/O Type | 5.0 V TTL |
| Interface | Async |
| Length (mm) | 19 |
| MOQ | 400 |
| Organization | 4K x 9 |
| Package Area (mm²) | 361 |
| Pb Free Category | e3 Sn |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 19.0 x 19.0 x 3.63 |
| Pkg. Type | PLCC |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 400 |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | Yes |
| Temp. Range (°C) | 0 to 70°C |
| Thickness (mm) | 3.63 |
| Width (mm) | 19 |
| 已发布 | No |
有关 7014 的资源
描述
The 7014 is a high-speed 4K x 9 dual-port static RAM designed to be used in systems where on-chip hardware port arbitration is not needed. This part lends itself to high-speed applications which do not rely on BUSY signals to manage simultaneous access. It utilizes a 9-bit wide data path to allow for parity at the user's option, which is useful in data communication applications where it is necessary to use a parity bit for transmission/ reception error checking.