封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | PBGA |
| Pkg. Code: | BG119 |
| Lead Count (#): | 119 |
| Pkg. Dimensions (mm): | 14.0 x 22.0 x 2.15 |
| Pitch (mm): | 1.27 |
环境和出口类别
| Pb (Lead) Free | No |
| ECCN (US) | 3A991.b.2.a |
| HTS (US) | 8542.32.0041 |
| Moisture Sensitivity Level (MSL) | 3 |
产品属性
| Lead Count (#) | 119 |
| Pb (Lead) Free | No |
| Carrier Type | Reel |
| Architecture | ZBT |
| Bus Width (bits) | 18 |
| Core Voltage (V) | 3.3 |
| Cycle Time (ns) | 80 |
| Density (Kb) | 4608 |
| I/O Voltage (V) | 2.5 - 2.5 |
| Length (mm) | 14 |
| MOQ | 1000 |
| Moisture Sensitivity Level (MSL) | 3 |
| Organization | 256K x 18 |
| Output Type | Flowthrough |
| Package Area (mm²) | 308 |
| Pb Free Category | e0 |
| Pitch (mm) | 1.27 |
| Pkg. Dimensions (mm) | 14.0 x 22.0 x 2.15 |
| Pkg. Type | PBGA |
| Qty. per Carrier (#) | 0 |
| Qty. per Reel (#) | 1000 |
| Reel Size (in) | 13 |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | Yes |
| Temp. Range (°C) | -40 to 85°C |
| Thickness (mm) | 2.15 |
| Width (mm) | 22 |
| 已发布 | No |
有关 71V3559 的资源
描述
The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).