特性
- Functionally compatible with the 720x family
- Low-power consumption
- 15ns access time
- Asynchronous and simultaneous read and write
- Fully expandable by both word depth and/or bit width
- Status flags: Empty, Half-Full, Full
- Auto-retransmit capability
- Available in a 32-pin PLCC package
- Industrial temperature range (–40 °C to +85 °C) is available
描述
The 72V06 is a 16K x 9 dual-port First-In, First-Out (FIFO) that operates at Vcc between 3.0V and 3.6V. The device will load and empty data on a first-in/first-out basis. It uses Full and Empty flags to prevent data overflow and underflow. And, it has a Retransmit (RT) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. The 72V06 is designed for applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
产品参数
| 属性 | 值 |
|---|---|
| Core Voltage (V) | 3.3 |
| Bus Width (bits) | 9 |
| Density (Kb) | 144 |
| Pkg. Code | PLG32 |
| Interface | Asynchronous |
| I/O Type | 3.3 V LVTTL |
| Organization | 16K x 9 |
| Temp. Range (°C) | -40 to 85°C, 0 to 70°C |
| Architecture | Uni-directional |
| Access Time (ns) | 15, 25 |
封装选项
| Pkg. Type | Pkg. Dimensions (mm) | Lead Count (#) | Pitch (mm) |
|---|---|---|---|
| PLCC | 13.97 x 11.43 x 2.79 | 32 | 1.27 |