特性
- Two LVCMOS / LVTTL outputs
- Differential CLK, nCLK input pair
- CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL
- Maximum output frequency: 350MHz
- Output skew: 15ps (maximum)
- Part-to-part skew: 600ps (maximum)
- Additive phase jitter, RMS: 0.03ps (typical)
- Small 8 lead SOIC package saves board space
- 3.3V core, 3.3V, 2.5V or 1.8V output operating supply
- -40°C to 85°C ambient operating temperature
- Available lead-free RoHS (6) package
描述
The 83026I-01 is a low skew, 1-to-2 Differential-to- LVCMOS/LVTTL Fanout Buffer. The differential input can accept most differential signal types (LVPECL, LVDS, LVHSTL, HCSL and SSTL) and translate to two single-ended LVCMOS/LVTTL outputs. The small 8-lead SOIC footprint makes this device ideal for use in applications with limited board space.
产品参数
| 属性 | 值 |
|---|---|
| Function | Buffer |
| Outputs (#) | 2 |
| Output Type | LVCMOS |
| Output Freq Range (MHz) | - |
| Input Type | LVPECL, LVDS, LVHSTL, SSTL, HCSL |
| Output Banks (#) | 1 |
| Output Voltage (V) | 1.8, 2.5, 3.3 |
| Output Skew (ps) | 15 |
| Additive Phase Jitter Typ RMS (fs) | 30 |