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瑞萨电子 (Renesas Electronics Corporation)

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数据手册、文档以及样品订购仍将通过 Renesas.com 官网提供,直至 2026 年底。如需新设计、采购、技术支持以及产品咨询,请访问 SiTime.com 官网或发送电子邮件至 [email protected]。预计于 2026 年底前全面过渡至 SiTime。

Low Skew,1-to-12 Differential-to-LVCMOS/LVTTL Fanout Buffer

封装信息

CAD 模型:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PRG32
Lead Count (#):32
Pkg. Dimensions (mm):7.0 x 7.0 x 1.4
Pitch (mm):0.8

环境和出口类别

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)32
Carrier TypeTray
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)0
Qty. per Carrier (#)250
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Core Voltage (V)3.3
FunctionBuffer, Multiplexer
Input Freq (MHz)250
Input TypeHCSL, HSTL, LVCMOS, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)7
MOQ250
Output Banks (#)1
Output Freq Range (MHz)250
Output Skew (ps)350
Output TypeLVCMOS
Output Voltage (V)3.3
Outputs (#)12
Package Area (mm²)49
Pitch (mm)0.8
Pkg. Dimensions (mm)7.0 x 7.0 x 1.4
Pkg. TypeTQFP
Product CategoryClock Buffers & Drivers
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1.4
Width (mm)7

描述

The 83948I is a low skew, 1-to-12 Differential-to-LVCMOS/LVTTL Fanout Buffer and a member of the family of High Performance Clock Solutions from IDT. The 83948I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The 83948I is characterized at full 3.3V core/3.3V output. Guaranteed output and part-to-part skew characteristics make the 83948I ideal for those clock distribution applications demanding well defined performance and repeatability.