概览
描述
The 84036 (6116 SRAM) is organized as 2K x 8. This part offers a reduced power standby mode.The low-power version also offers a battery backup data retention capability where the circuit typically consumes only 1µW to 4µW operating off a 2V battery. All inputs and outputs are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation.
特性
- High-speed access and chip select times – 45/55/70/90/120ns (max.)
- Low-power consumption
- Battery backup operation – 2V data retention voltage
- Produced with advanced CMOS high-performance technology
- CMOS process virtually eliminates alpha particle soft-error rates
- Input and output directly TTL-compatible
- Static operation: no clocks or refresh required
- Available in 24-pin (300 or 600 mil) ceramic DIP package
- Military product compliant to MIL-STD-833, Class B
产品对比
应用
设计和开发
模型
ECAD 模块
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