封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | TSSOP |
| Pkg. Code: | PGG16 |
| Lead Count (#): | 16 |
| Pkg. Dimensions (mm): | 5.0 x 4.4 x 1.0 |
| Pitch (mm): | 0.65 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | EAR99 |
| HTS (US) | 8542.39.0090 |
产品属性
| Lead Count (#) | 16 |
| Carrier Type | Tube |
| Moisture Sensitivity Level (MSL) | 1 |
| Qty. per Reel (#) | 0 |
| Qty. per Carrier (#) | 96 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 85°C |
| Additive Phase Jitter Typ RMS (fs) | 140 |
| Additive Phase Jitter Typ RMS (ps) | 0.14 |
| Core Voltage (V) | 3.3 |
| Function | Buffer, Multiplexer |
| Input Freq (MHz) | 500 |
| Input Type | HCSL, HSTL, LVCMOS, LVDS, LVPECL |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 96 |
| Output Banks (#) | 1 |
| Output Freq Range (MHz) | 500 |
| Output Skew (ps) | 65 |
| Output Type | HCSL |
| Output Voltage (V) | 3.3 |
| Outputs (#) | 2 |
| Package Area (mm²) | 22 |
| Pitch (mm) | 0.65 |
| Pkg. Dimensions (mm) | 5.0 x 4.4 x 1.0 |
| Pkg. Type | TSSOP |
| Product Category | Clock Buffers & Drivers, Clock Multiplexers |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Tape & Reel | No |
| Thickness (mm) | 1 |
| Width (mm) | 4.4 |
有关 85102I 的资源
描述
The 85102I is a low skew, high performance 1-to-2 Differential-to-HCSL fanout buffer. The 85102I has a differential clock input. The CLK0, nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/deassertion of the clock enable pin.
Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defined performance and repeatability.
