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瑞萨电子 (Renesas Electronics Corporation)

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Low Skew,1-to-17 Differential-to-3.3V LVPECL Fanout Buffer

封装信息

Pkg. Type:TQFP
Pkg. Code:PPG52
Lead Count (#):52
Pkg. Dimensions (mm):10.0 x 10.0 x 1.4
Pitch (mm):0.65

环境和出口类别

Pb (Lead) FreeYes
Moisture Sensitivity Level (MSL)3
ECCN (US)
HTS (US)

产品属性

Pkg. TypeTQFP
Lead Count (#)52
Pb (Lead) FreeYes
Carrier TypeReel
Core Voltage (V)3.3
FunctionBuffer, Multiplexer
Input Freq (MHz)500
Input TypeCML, HCSL, HSTL, LVDS, LVPECL, SSTL
Inputs (#)2
Length (mm)10
MOQ500
Moisture Sensitivity Level (MSL)3
Output Banks (#)1
Output Freq Range (MHz)500
Output Skew (ps)50
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)17
Package Area (mm²)100
Pb Free Categorye3 Sn
Pitch (mm)0.65
Pkg. Dimensions (mm)10.0 x 10.0 x 1.4
Qty. per Carrier (#)0
Qty. per Reel (#)500
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Temp. Range (°C)0 to 70°C
Thickness (mm)1.4
Width (mm)10

描述

The 8532AY-01 is a low skew, 1-to-17, Differential- to-3.3V LVPECL Fanout Buffer and a member of the family of High Performance Clock Solutions from ICS. The 8532AY-01 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8532AY-01 ideal for those clock distribution applications demanding well defined performance and repeatability.