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瑞萨电子 (Renesas Electronics Corporation)
8:1 Differential-to-LVDS Clock Multiplexer

封装信息

CAD 模型:View CAD Model
Pkg. Type:TSSOP
Pkg. Code:PGG24
Lead Count (#):24
Pkg. Dimensions (mm):7.8 x 4.4 x 1.0
Pitch (mm):0.65

环境和出口类别

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)24
Carrier TypeTube
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)62
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Country of AssemblyTAIWAN
Country of Wafer FabricationAUSTRIA
Additive Phase Jitter Typ RMS (fs)65
Additive Phase Jitter Typ RMS (ps)0.065
Core Voltage (V)3.3
FunctionMultiplexer
Input Freq (MHz)2500
Input TypeLVDS, LVPECL, SSTL
Inputs (#)8
Length (mm)7.8
MOQ62
Output Banks (#)1
Output Freq Range (MHz)2500
Output TypeLVDS
Output Voltage (V)3.3
Outputs (#)1
Package Area (mm²)34.3
Pitch (mm)0.65
Pkg. Dimensions (mm)7.8 x 4.4 x 1.0
Pkg. TypeTSSOP
Price (USD)$10.68106
Product CategoryClock Multiplexers
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1
Width (mm)4.4
已发布No

描述

The 854S058I is an 8:1 Differential-to-LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S058I has 8 selectable differential clock inputs. The PCLK, nPCLK input pairs can accept LVPECL, LVDS or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL2 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 000 selects PCLK0, nPCLK0).