概览
描述
The ICS854S202I-01 is a 12:2 Differential-to-LVDS Clock Multiplexer which can operate up to 3GHz. The ICS854S202I-01 has twelve selectable differential clock inputs, any of which can be independently routed to either of the two LVDS outputs. The CLKx, nCLKx input pairs can accept LVPECL, LVDS or CML levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits.
特性
- Two differential 2.5V LVDS clock outputs
- Twelve selectable differential clock inputs
- CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, CML
- Maximum output frequency: 3GHz
- Propagation delay: 1.1ns (maximum)
- Input skew: 100ps (maximum)
- Output skew: 50ps (maximum)
- Part-to-part skew: 250ps (maximum)
- Additive phase jitter, RMS (12kHz – 20MHz): 0.16ps (typical)
- Full 2.5V operating supply mode
- -40°C to 85°C ambient operating temperature
产品对比
应用
设计和开发
模型
ECAD 模块
点击产品选项表中的 CAD 模型链接，查找 SamacSys 中的原理图符号、PCB 焊盘布局和 3D CAD 模型。如果符号和模型不可用，可直接在 SamacSys 请求该符号或模型。
产品选项
当前筛选条件