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瑞萨电子 (Renesas Electronics Corporation) - June is Pride Month, a month to raise awareness of the rights and the culture of the LGBTQ+ community

特性

  • Two programmable differential LVDS or LVPECL output banks
  • Two differential clock input pairs
  • PCLKx, nPCLKx pairs can accept the following differential input levels: LVDS, LVPECL, SSTL, CML
  • Maximum output frequency: 3GHz
  • Translates any single ended input signal to LVDS levels with resistor bias on nPCLKx inputs
  • Output skew: 15ps (maximum)
  • Bank skew: 15ps (maximum)
  • Propagation delay: 500ps (maximum)
  • Additive phase jitter, RMS: 0.15ps (typical)
  • Full 3.3V or 2.5V supply modes
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package
  • Two programmable differential LVDS or LVPECL output banks
  • Two differential clock input pairs
  • PCLKx, nPCLKx pairs can accept the following differential input levels: LVDS, LVPECL, SSTL, CML
  • Maximum output frequency: 3GHz
  • Translates any single ended input signal to LVDS levels with resistor bias on nPCLKx inputs
  • Output skew: 15ps (maximum)
  • Bank skew: 15ps (maximum)
  • Propagation delay: 500ps (maximum)
  • Additive phase jitter, RMS: 0.15ps (typical)
  • Full 3.3V or 2.5V supply modes
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

描述

The 854S204I is a low skew, high performance dual, programmable 1-to-2 Differential-to-LVDS, LVPECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept most standard differential input levels. With the selection of SEL_OUT signal, outputs can be selected be to either LVDS or LVPECL levels. The 854S204I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and bank skew characteristics make the 854S204I ideal for those clock distribution applications demanding well defined performance and repeatability. The 854S204I is a low skew, high performance dual, programmable 1-to-2 Differential-to-LVDS, LVPECL Fanout Buffer. The PCLKx, nPCLKx pairs can accept most standard differential input levels. With the selection of SEL_OUT signal, outputs can be selected be to either LVDS or LVPECL levels. The 854S204I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and bank skew characteristics make the 854S204I ideal for those clock distribution applications demanding well defined performance and repeatability.

Part NumberStatusSamplesStockPackageLead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)
854S204BGILFObsoleteN/AIn StockTSSOP16#Tube1096#Yese3 Sn-40 to 85°C
854S204BGILFTObsoleteN/AIn StockTSSOP16#Reel12500#0Yese3 Sn-40 to 85°C
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