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Clock Fanout Buffer/Frequency Divider

封装信息

CAD 模型:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG20
Lead Count (#):20
Pkg. Dimensions (mm):4.0 x 4.0 x 1.0
Pitch (mm):0.5

环境和出口类别

Moisture Sensitivity Level (MSL)1
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)20
Carrier TypeTray
Moisture Sensitivity Level (MSL)1
Qty. per Reel (#)0
Qty. per Carrier (#)490
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Additive Phase Jitter Typ RMS (ps)114
Core Voltage (V)3.3
Divider Value1, 2, 4, 5, 8
FunctionBuffer, Divider
Input Freq (MHz)2000
Input TypeLVCMOS, LVPECL, LVDS
Inputs (#)2
Length (mm)4
MOQ490
Output Banks (#)2
Output Freq Range (MHz)250, 400, 500, 1000, 2000
Output Skew (ps)22
Output TypeLVDS
Output Voltage (V)3.3
Outputs (#)2
Package Area (mm²)16
Pitch (mm)0.5
Pkg. Dimensions (mm)4.0 x 4.0 x 1.0
Pkg. TypeVFQFPN
Price (USD)$9.6004
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelNo
Thickness (mm)1
Width (mm)4
已发布No

描述

The 8V74S4622 is a versatile clock fanout buffer/frequency divider. The device supports the selection, division, and distribution of high-frequency clock signals with very low additive phase noise. The 8V74S4622 uses SiGe technology for an optimum of high clock frequency and low phase noise performance, combined with high power supply noise rejection and internal isolation.

Two selectable inputs are supported for differential and single-ended clocks. Each of the two outputs can select a copy or a frequency-divided input signal. The available frequency divisions are divided by 2, 4, 5, and 8. Both outputs support LVDS interfaces. For each of the two outputs, a synchronous output-enabled control is implemented for stopping the output clock synchronously to the input clock signal. All device configurations are through a logic pin interface. The device is packaged in a lead-free (RoHS 6) 20-lead VFQFN package. The extended temperature range supports wireless infrastructure, telecommunication and networking end equipment requirements.