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Jitter Attenuator & FemtoClock Multiplier

封装信息

CAD 模型:View CAD Model
Pkg. Type:VFQFPN
Pkg. Code:NLG32
Lead Count (#):32
Pkg. Dimensions (mm):5.0 x 5.0 x 0.9
Pitch (mm):0.5

环境和出口类别

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)32
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)2500
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)-40 to 85°C
Core Voltage (V)3.3
Feedback InputNo
Input Freq (MHz)0.008 - 155.52
Input TypeLVPECL, LVDS
Inputs (#)1
Length (mm)5
MOQ2500
Output Banks (#)2
Output Freq Range (MHz)25 - 156.25
Output Skew (ps)25
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)2
Package Area (mm²)25
Phase Jitter Max RMS (ps)0.3
Phase Jitter Typ RMS (ps)0.223
Pitch (mm)0.5
Pkg. Dimensions (mm)5.0 x 5.0 x 0.9
Pkg. TypeVFQFPN
Product CategoryFemtoClock NG, Jitter Attenuators
Prog. ClockNo
Reel Size (in)13
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Tape & ReelYes
Thickness (mm)0.9
Width (mm)5
Xtal Freq (KHz)25000 - 25000

描述

The 8V89308I is a PLL based synchronous multiplier specifically designed for applications utilizing Broadcom PHYs and Switches. This high performance device is optimized for Ethernet / SONET PDH frequency translation and clock jitter attenuation. The device contains two internal frequency multiplication stages that are cascaded in series. The first stage is a low bandwidth PLL that is optimized to provide reference clock jitter attenuation. The second stage is a FemtoClock® frequency multiplier that provides the low jitter, high frequency Ethernet output clock that easily meets Gigabit and 10 Gigabit Ethernet jitter requirements. Pre-divider and output divider multiplication ratios are selected using device selection control pins. The multiplication ratios are optimized to support most common clock rates used in Ethernet, SONET, PDH applications. 8V89308I requires the use of an external, inexpensive fundamental mode crystal and uses external passive loop filter components which allows configuration of the PLL loop bandwidth and damping characteristics. The device is packaged in a space-saving 32-VFQFN package and supports industrial temperature range.