9FGL08

特性

PCIe Gen 1–6 CC-compliant
Supports PCIe SRIS and SRNS clocking
Integrated terminations for 100Ω and 85Ω systems save 4 resistors per output
Pin-selectable SRNS 0%, CC 0%, and CC/SRIS -0.5% spread
SMBus-selectable CC/SRIS -0.25% spread
One 3.3V LVCMOS REF output with Wake-On-LAN (WOL) support
Easy AC coupling to other logic families, see application note AN-891.
Space-saving 6mm × 6mm 48-VFQFPN

描述

The 9FGL0841/51 devices are 8-output 3.3V PCIe Gen 1–6 clock generators. Each output has a dedicated OE# pin supporting PCIe CLKREQ# functionality. Two different spread spectrum levels, in addition to spread off, are supported. The 9FGL0841/51 supports PCIe Gen 1–6 Common Clocked architectures (CC), PCIe Separate Reference no Spread (SRNS), and Separate Reference Independent Spread (SRIS) clocking architectures.

For information regarding evaluation boards and material, please contact your local sales representative.

产品参数

属性	值
Diff. Outputs	8
Diff. Output Signaling	LP-HCSL
Output Freq Range (MHz)	25 - 25, 100 - 100
Power Consumption Typ (mW)	100
Supply Voltage (V)	3.3 - 3.3
Output Type	LP-HCSL, LVCMOS
Xtal Freq (MHz)	25 - 25
Diff. Termination Resistors	0
Package Area (mm²)	36
Battery Backup	No
Battery Seal	No
CPU Supervisory Function POR	No
Crystal Frequency Trimming	No
Frequency Out Pin	No
Inputs (#)	1
Input Freq (MHz)	25 - 25
Function	Generator
Input Type	Crystal, LVCMOS
Core Voltage (V)	3.3
Output Voltage (V)	0.8V, 3.3V