封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | LGA |
| Pkg. Code: | LW0064AA |
| Lead Count (#): | 64 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.66 |
| Pitch (mm): | 0.5 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 3 |
| Pb (Lead) Free | Yes |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | LGA |
| Lead Count (#) | 64 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 3 |
| Qty. per Reel (#) | 4000 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 105°C |
| Country of Assembly | TAIWAN |
| Country of Wafer Fabrication | TAIWAN |
| Accepts Spread Spec Input | Yes |
| Additive Jitter | 4fs |
| Additive Phase Jitter Typ RMS (fs) | 2.8 |
| Advanced Features | Multiple SMBus addresses, Power Down Tolerant, Flexible Startup Sequencing, SMBus enabled Automatic Clock Parking |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6, PCIe Gen7, DB1206, DB2000Q, QPI, UPI |
| Architecture | Common, SRIS, SRNS |
| Chipset Manufacturer | Intel |
| Clock Spec. | DB2000Q |
| Core Voltage (V) | 3.3V |
| Diff. Input Signaling | HCSL |
| Diff. Inputs | 1 |
| Diff. Output Signaling | LP-HCSL |
| Diff. Outputs | 12 |
| Function | Fanout Buffer |
| Input Freq (MHz) | 1 - 400 |
| Input Type | HCSL |
| Inputs (#) | 1 |
| Length (mm) | 5 |
| MOQ | 4000 |
| Output Banks (#) | 1 |
| Output Enable (OE) Pins | 12 |
| Output Freq Range (MHz) | 1 - 400 |
| Output Impedance | 85 |
| Output Skew (ps) | 50 |
| Output Type | LP-HCSL |
| Outputs (#) | 12 |
| PLL | No |
| Package Area (mm²) | 25 |
| Pitch (mm) | 0.5 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.66 |
| Power Consumption Typ (mW) | 441 |
| Product Category | Clock Buffers & Drivers, PCI Express Clocks |
| Reel Size (in) | 13 |
| Reference Output | No |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 0.66 |
| VOUT Amplitude Control | No |
| VOUT Slew-rate Control | Yes |
| Width (mm) | 5 |
有关 9QXL1200 的资源
描述
9QXL1200 是一款超高性能 PCIe Gen7 扇出缓冲器，向后兼容前几代 PCIe。 它具有信号丢失 （LOS） 输出，用于系统监控和弹性。 该器件还集成了断电容限 （PDT） 和灵活启动排序 （FSS） 功能，从而简化了系统设计。