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CMOS Dual D Type Flip Flop with Set and Reset, Advanced Logic

封装信息

CAD 模型:View CAD Model
Pkg. Type:DIE
Pkg. Code:
Lead Count (#):
Pkg. Dimensions (mm):0.0 x 0.0 x 0.00
Pitch (mm):

环境和出口类别

Moisture Sensitivity Level (MSL)Not Applicable
Pb (Lead) FreeYes
ECCN (US)9A515.e.1
HTS (US)8542.39.0090
RoHS (ACTS74HMSR-02)英语日文

产品属性

Carrier TypeDie Waffle Pack
Moisture Sensitivity Level (MSL)Not Applicable
DLA SMD5962F9671302V9A
Pb (Lead) FreeYes
Pb Free CategoryNone
MOQ100
Temp. Range (°C)-55 to +125°C
DSEE (MeV·cm2/mg)SEL free
Lead CompliantNo
Pkg. Dimensions (mm)0.0 x 0.0 x 0.00
Pkg. TypeDIE
Qualification LevelQML Class V (space)
RatingSpace
TID HDR (krad(Si))300
TID LDR (krad(Si))ELDRS free
Tape & ReelNo

描述

The Intersil ACTS74MS is a radiation hardened Dual D flip-flop with Set(s) and Reset (R). The logic level at data input is transferred to the output during the positive transition of the clock. The Set and Reset are independent from the clock and accomplished by a low level on the appropriate input. The ACTS74MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of the radiation hardened, high-speed, CMOS/SOS logic family. The ACTS74MS is supplied in a 14-lead Ceramic Flatpack (K suffix) or a 14-lead Ceramic Dual-In-Line package (D suffix).