封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | SBDIP |
| Pkg. Code: | HSG |
| Lead Count (#): | 14 |
| Pkg. Dimensions (mm): | 19.00 x 7.37 x 2.41 |
| Pitch (mm): | 2.54 |
环境和出口类别
| Pb (Lead) Free | No |
| Moisture Sensitivity Level (MSL) | |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | SBDIP |
| Lead Count (#) | 14 |
| Carrier Type | Tube |
| Pitch (mm) | 2.5 |
| Pkg. Dimensions (mm) | 19.0 x 7.4 x 2.41 |
| DLA SMD | 5962-96654 |
| Pb (Lead) Free | No |
| MOQ | 15 |
| Temp. Range (°C) | -55 to +125°C |
| DSEE (MeV·cm2/mg) | 75 |
| Length (mm) | 19 |
| Qualification Level | QML Class V (space) |
| Rating | Space |
| TID HDR (krad(Si)) | 100 |
| TID LDR (krad(Si)) | ELDRS free |
| Thickness (mm) | 2.41 |
| Width (mm) | 7.4 |
有关 CD4071BMS 的资源
描述
Support is limited to customers who have already adopted these products.
CD4071BMS, CD4072BMS and CD4075BMS OR gates provide the system designer with direct implementation of the positive-logic OR function and supplement the existing family of CMOS gates. The CD4071BMS, CD4072BMS and CD4075BMS are supplied in these 14 lead outline packages: Braze Seal DIP *H4H †H4Q Frit Seal DIP H1B Ceramic Flatpack H3W *CD4071, CD4072 †CD4075 Only