特性
- 2.5V to 5.5V input voltage
- 0.3V to 1.9V output voltage
- 4MHz nominal switching frequency
- ±1% accuracy (static)
- ±5% accuracy (dynamic)
- I2C-compatible interface (FM+)
- Programmable GPIOs
- Programmable soft-start
- Voltage, current and temperature supervision
- Key safety features
- Output undervoltage and overvoltage protection
- Input undervoltage protection
- 2-step over-temperature protection
- -40 °C to +105 °C ambient temperature range
- AEC-Q100 Grade 2 qualified for automotive applications
描述
The DA9132-A is a high-efficiency, automotive-grade, dual-channel, step-down DC/DC (buck) converter with integrated switching FETs delivering 3A per channel. The device can operate at efficiency levels above 90%, reducing the thermal design challenges of powering high current rails in a wide range of automotive applications such as navigation systems, infotainment, telematics, Advanced Driver Assistance Systems (ADAS), or any automotive high-performance processing system requiring efficient, high current, power delivery.
The DA9132-A device has an input voltage range of 2.5V to 5.5V and an output voltage range of 0.3V to 1.9V, making it suitable for a wide variety of low voltage systems. The DA9132-A only requires two small 0.10µH inductors, delivering a highly optimized BOM and footprint. Output voltages above 1.9V are supported with an external resistor divider.
The DA9132-A device is part of the Renesas family of flexible, scalable, reliable automotive systems and sub-PMICs, enabling an "Exact-Fit" power solution. It is available in a 3.3mm x 4.8mm, 24-pin FC-QFN wettable flank package. An industrial/commercial grade version is also available (DA9132).
Benefits
- High-efficiency buck converters deliver outstanding thermal performance.
- Fully integrated switching FETs means no external FETs or Schottky diodes are required.
- Remote sensing guarantees the highest accuracy and supports multiple PCB routing scenarios without loss of performance.
- Fully programmable soft-start limits the inrush current from the input to give a slope-controlled output voltage.
- Dynamic Voltage Control (DVC) enables adaptive adjustment of the device output voltage depending on the load. This increases efficiency when the downstream circuitry enters low power or idle mode, resulting in power savings.
- Configurable GPIOs support a range of features including I2C, DVC and Power-Good indicator.
- Optimized BOM cost and footprint: Each output requires a very small inductor and capacitor delivering parts and cost savings.
- Cycle-by-cycle current limiting for superior overcurrent protection.
产品参数
| 属性 | 值 |
|---|---|
| Function | 2-ch PMIC |
| Outputs (#) | 2 |
| Input Voltage (Min) (V) | 2.8 |
| Input Voltage (Max) (V) | 5.5 |
| Switching Regulators | 1 |
| Switching Frequency (MHz) | 4 - 4 |
| GPIOs (#) | 5 |
| Comm. Interface | I2C |
| Advanced Features | Dual 3A single phase, Integrated FETs. Output voltage 0.3V – 1. 9V |
| Qualification Level | Automotive |
封装选项
| Pkg. Type | Lead Count (#) | Pitch (mm) |
|---|---|---|
| 24-WFQFN | 24 | 0.5 |
应用
- Vehicle infotainment systems
- ADAS
- Automotive navigation
- Automotive center console
- Automotive cluster
- Telematics
- SoC/FPGA-based, high-performance, automotive Electronic Control Unit (ECU) requiring efficient, high current, power delivery
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free |
|---|---|---|---|---|---|---|---|---|
| DA9132-XXRT1-A | Active | Available | Out of Stock | 24-WFQFN | 24# | Tray | 3 | Yes |
| DA9132-XXRT1-AT | Active | Available | Out of Stock | 24-WFQFN | 24# | Tray | 3 | Yes |
| DA9132-XXRT2-A | Active | Available | Out of Stock | 24-WFQFN | 24# | Tape & Reel | 3 | Yes |
| DA9132-XXRT2-AT | Active | Available | Out of Stock | 24-WFQFN | 24# | Tape & Reel | 3 | Yes |
- 数据手册英语DA9132-A DatasheetRECOMMENDEDPDF 912 KB R16DS0579EJ0300 Rev.3.00 2025年9月04日The DA9132-A is a high-performance, dual-channel DC-DC converter for automotive applications. DA9132-A is suitable for supplying CPUs, GPUs, and DDR memory rails in single in-line pin package (SIPP) modules, vehicle infotainment systems, ADAS, automotive navigation, center console, and telematics.
- 应用说明英语PDF 340 KB AN-PM-167 2025年7月14日AI 生成的摘要: Guidelines focus on optimal PCB layout techniques for DA913x power management ICs to ensure electrical and thermal performance. Key principles include using low impedance ground planes, thick current-carrying traces, and careful placement of input capacitors and inductors near the chip. Feedback traces require shielding from noise, especially from buck converter LX nodes, to prevent voltage ripple. Analog power pins (AVDD) need close decoupling capacitors, while GPIO pins have lower layout priority. Examples from Renesas reference boards illustrate effective layer stacking and thermal management. Design review services are available to optimize reliability.
- 数据手册英语DA9132-A DatasheetRECOMMENDEDPDF 912 KB R16DS0579EJ0300 Rev.3.00 2025年9月04日The DA9132-A is a high-performance, dual-channel DC-DC converter for automotive applications. DA9132-A is suitable for supplying CPUs, GPUs, and DDR memory rails in single in-line pin package (SIPP) modules, vehicle infotainment systems, ADAS, automotive navigation, center console, and telematics.
推荐文档 (1)
- 数据手册英语DA9132-A DatasheetRECOMMENDEDPDF 912 KB R16DS0579EJ0300 Rev.3.00 2025年9月04日The DA9132-A is a high-performance, dual-channel DC-DC converter for automotive applications. DA9132-A is suitable for supplying CPUs, GPUs, and DDR memory rails in single in-line pin package (SIPP) modules, vehicle infotainment systems, ADAS, automotive navigation, center console, and telematics.
数据手册 (1)
手册和指南 (2)
- 应用说明英语PDF 340 KB AN-PM-167 2025年7月14日AI 生成的摘要: Guidelines focus on optimal PCB layout techniques for DA913x power management ICs to ensure electrical and thermal performance. Key principles include using low impedance ground planes, thick current-carrying traces, and careful placement of input capacitors and inductors near the chip. Feedback traces require shielding from noise, especially from buck converter LX nodes, to prevent voltage ripple. Analog power pins (AVDD) need close decoupling capacitors, while GPIO pins have lower layout priority. Examples from Renesas reference boards illustrate effective layer stacking and thermal management. Design review services are available to optimize reliability.
应用说明和白皮书 (1)
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