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VCSO Based FEC Clock PLL

封装信息

Pkg. Type:CLCC
Pkg. Code:CG36
Lead Count (#):36
Pkg. Dimensions (mm):9.0 x 9.0 x 2.8
Pitch (mm):0.6

环境和出口类别

Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090
Moisture Sensitivity Level (MSL)1

产品属性

Pkg. TypeCLCC
Lead Count (#)36
Pb (Lead) FreeYes
Carrier TypeReel
Common Input Freq (MHz)20.92MHz, 83.67MHz, 167.33MHz, 669.33MHz
Core Voltage (V)3.3
Diff. Input Signaling3.3
Diff. Output Signaling3.3
Divider Value1, 4
Feedback Divider1 - 1, 2 - 2, 4 - 4, 8 - 8, 14 - 14, 15 - 15, 32 - 32, 79 - 79, 85 - 85, 236 - 236, 239 - 239, 255 - 255
FunctionFEC Translation Clock PLL, Jitter Attenuation
I/O Voltage (V)3.3 - 3.3
Input Freq (MHz)10 - 700
Input TypeLVPECL
Inputs (#)2
Length (mm)9
M/R Look-Up TableYes
MOQ500
Moisture Sensitivity Level (MSL)1
Operating Freq669.327
Output Banks (#)2
Output Freq Range (MHz)100 - 700
Output SignalingLVPECL
Output TypeLVPECL
Output Voltage (V)3.3
Outputs (#)2
Package Area (mm²)81
Pb Free Categorye4 Au
Phase Jitter Max RMS (ps)0.5
Phase Jitter Typ RMS (ps)0.25
Pitch (mm)0.6
Pkg. Dimensions (mm)9.0 x 9.0 x 2.8
Qty. per Carrier (#)0
Qty. per Reel (#)500
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Supply Voltage (V)3.3 - 3.3
Tape & ReelYes
Temp. Range (°C)0 to 70°C
Thickness (mm)2.8
Width (mm)9

描述

The M2006-02A is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock frequency translation and jitter attenuation. The device supports both forward and inverse FEC (Forward Error Correction) clock multiplication ratios. Multiplication ratios are pin-selected from pre-programming look-up tables.