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LVCMOS PLL Clock Generator

封装信息

CAD 模型:View CAD Model
Pkg. Type:TQFP
Pkg. Code:PRG32
Lead Count (#):32
Pkg. Dimensions (mm):7.0 x 7.0 x 1.4
Pitch (mm):0.8

环境和出口类别

Moisture Sensitivity Level (MSL)3
Pb (Lead) FreeYes
ECCN (US)EAR99
HTS (US)8542.39.0090

产品属性

Lead Count (#)32
Carrier TypeReel
Moisture Sensitivity Level (MSL)3
Qty. per Reel (#)2000
Qty. per Carrier (#)0
Pb (Lead) FreeYes
Pb Free Categorye3 Sn
Temp. Range (°C)0 to 70°C
C-C Jitter Max P-P (ps)22
C-C Jitter Typ P-P (ps)10
Core Voltage (V)3.3V, 2.5V
Diff. Input Signaling3.3, 2.5
Divider Value1, 2, 4
Feedback Divider1 - 1, 2 - 2, 4 - 4
Feedback InputYes
FunctionClock Generator
Input Freq (MHz)18.75 - 160
Input TypeLVCMOS
Inputs (#)2
Length (mm)7
MOQ2000
Operating Freq160
Output Banks (#)3
Output Freq Range (MHz)18.75 - 160
Output SignalingLVCMOS
Output Skew (ps)120
Output TypeLVCMOS
Output Voltage (V)3.3V, 2.5V
Outputs (#)8
Package Area (mm²)49
Period Jitter Max P-P (ps)15
Period Jitter Typ P-P (ps)8
Pitch (mm)0.8
Pkg. Dimensions (mm)7.0 x 7.0 x 1.4
Pkg. TypeTQFP
Product CategoryGeneral Purpose Clocks
Prog. ClockNo
Reel Size (in)13
Reference OutputNo
Requires Terms and ConditionsDoes not require acceptance of Terms and Conditions
Spread SpectrumNo
Supply Voltage (V)3.3 - 3.3
Tape & ReelYes
Thickness (mm)1.4
VCO Max Freq (MHz)160
VCO Min Freq (MHz)75
Width (mm)7

描述

The MPC9315 is a 2.5 V and 3.3 V compatible, PLL based clock generator designed for low-skew clock distribution in low-voltage mid-range to high-performance telecom, networking and computing applications. The MPC9315 offers 8 low-skew outputs and 2 selectable inputs for clock redundancy. The outputs are configurable and support 1:1, 2:1, 4:1, 1:2 and 1:4 output to input frequency ratios. In addition, a selectable output 180° phase control supports advanced clocking schemes with inverted clock signals. The MPC9315 is specified for the extended temperature range of -40 to +85°C.