特性
- One high-voltage synchronous buck controller with:
- Wide VIN range, 7V to 26V
- Programmable VOUT (0.8V to 5.25V when VIN <13.2V, 1.8V to 5.25V when VIN >13.2V)
- Up to 20A IOUT depending on external MOSFET
- Three synchronous buck converters with integrated low RON FET:
- Buck1: programmable VOUT from 0.75V to 3.3V with 5A continuous output current, and 6A peak current standalone
- Buck2: programmable VOUT from 0.9V to 3.6V with 2A continuous output current and 3A peak current standalone
- Buck3: programmable VOUT from 0.9V to 3.6V with 2A continuous output current and 3A peak current standalone
- DVC on buck controller and buck converters
- Auto mode on all buck converters, adjustable soft-start, and I2C-compatible interface
- GPIO to connect/control the other device
- Register-selectable multiple function: mute, reset timer, external thermal sense, and lower input voltage alarm
- -40 °C to +85 °C ambient temperature
- Package: 32-pin QFN
描述
The PV88080 power management integrated circuit (PMIC) provides one PWM buck controller and three adjustable synchronous buck regulators. The high voltage buck controller can optionally be used to generate the supply for the other three buck converters. Two pass devices (NMOS FET) for the high side and low side of the high voltage buck controller are external which allows the majority of the buck controller power dissipation to be outside the PV88080. This high voltage buck controller uses a constant on-time (COT) control scheme with an integrated bootstrap PMOS switch.
In certain applications, multiple PV88080s can be used together to provide enough power rails to power the larger systems. There are three buck converters that can be used to generate the supplies for CPUs, DDR memory and other auxiliary functions in a typical application. The pass devices of these buck converters are fully integrated, so no external FETs or Schottky diodes are needed. This results in optimized power efficiency and a reduced external component count.
Benefits
- 50% reduction in board area
- High integration of rails in single package
- Re-programmability = Fast re-design
- Slew rate control improved PCB cost/performance
- Dynamic Voltage Scaling (DVS) for enhanced performance/power scaling
- Significantly fewer devices and discretes
应用
- Networking home terminals
- Wi-Fi EAP/routers
- Supply for digital television processors
- Power supply for digital set-top boxes (STB)
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pb (Lead) Free |
|---|---|---|---|---|---|---|---|---|
| PV88080-001FR2 | NRND | N/A | Out of Stock | FC-MCQFN | 32# | Tape & Reel | 1 | Yes |
| PV88080-006FR2 | NRND | N/A | Out of Stock | FC-MCQFN | 32# | Tape & Reel | 1 | Yes |
- 应用说明英语PDF 267 KB 2021年2月12日AI 生成的摘要: IRQ line-sharing among multiple devices in Linux-based systems can cause unhandled interrupts, leading to kernel failures. When an IRQ remains unserviced, the Linux kernel disables the IRQ line, potentially affecting all devices sharing it. This behavior arises after a threshold of unhandled interrupts triggers a diagnostic message and disables the IRQ. Solutions include allocating dedicated IRQs, masking interrupts via OTP or bootloader, and managing driver installation order. Specific recommendations for PMIC devices like DA9210 and DA9063 address interrupt masks and fault log clearance to mitigate such issues.
- 应用说明英语PDF 873 KB 2021年2月12日AI 生成的摘要: Power rail sequencing uses 15 configurable time slots to control the power-up and power-down order of buck converters. Each buck converter is assigned a slot, with dummy slots inserted for delay adjustments. The STBY pin controls whether the system ends in standby or active mode by stopping the sequence at a defined slot. Delay times between slots can be fine-tuned using SEQ_TIME and SET_DUMMY parameters. For longer delays beyond 15 slots, the WAIT_ID function inserts additional wait time. Multiple PV88080 devices can be cascaded and controlled via GPIO and STBY pins.
- 应用说明英语PDF 696 KB 2021年2月12日AI 生成的摘要: Dynamic Voltage Control (DVC) adjusts power rail voltages dynamically based on processor load to optimize power consumption and performance. It increases voltage for higher processor speeds and decreases voltage to save power during low load. Traditional DVC uses resistor dividers and MOSFETs, requiring many components and large PCB area. The PV88080 simplifies this by enabling voltage adjustment via I2C register writes, reducing complexity and allowing programmable slew rates to minimize voltage overshoot and undershoot. The document details DVC settings for low voltage buck converters (LVBuck), including output voltage ranges and configuration via a graphical user interface.
- 应用说明英语PDF 529 KB 2018年4月24日AI 生成的摘要: Power Fail Detection and Audio Mute functions monitor the input voltage on the PV88080 and trigger an interrupt signal when preset thresholds are crossed. The Mute function uses four selectable voltage levels configured via OTP to mute audio output by controlling the amplifier's mute pin. Power Fail Detection employs an external resistive divider to set the comparator trip point, signaling the host processor to initiate system shutdown or mute audio. The mute trigger voltage is set above the Power-on Reset (POR) threshold, with a 200µs de-glitch delay to ensure stable recovery. OTP programming customizes these settings to fit specific applications.
- 应用说明英语PDF 586 KB 2018年4月24日AI 生成的摘要: Temperature sensing uses an NTC thermistor connected to the PV88080’s GPIO2 pin, which supplies a 10 µA current. The thermistor’s resistance decreases as temperature rises, causing the voltage at GPIO2 to drop below an internal 1.2 V reference. This triggers an alert via the nIRQ pin to notify the host processor of an over-temperature condition. The system can clear this alert through an I2C command, resetting the nIRQ signal. Design examples include calculating thermistor resistance and series resistor values to trigger alerts at specific temperatures, such as 100 °C. The document provides formulas and diagrams to assist in implementing reliable temperature monitoring on PCBs.
- 应用说明英语PDF 745 KB 2018年4月24日AI 生成的摘要: Power management in modern SoC systems requires multiple power supplies with complex startup and sequencing. Reducing leakage current is critical due to technology evolution. Digital voltage scaling (DVS) adapts supply voltage dynamically based on load, using methods such as direct resistor adjustment, adjustable feedback dividers, and I2C communication for programmable output voltage control. Stability across voltage ranges and proper feedback loop design are essential for reliable operation. Various techniques enable flexible voltage control without compromising system stability.
- 应用说明英语PDF 312 KB 2018年4月24日AI 生成的摘要: The PV88080 integrates one PWM high-voltage buck controller and three adjustable synchronous buck regulators to efficiently power CPUs, DDR memory, and auxiliary functions. It features external NMOS FETs for the high-voltage controller to reduce power dissipation, while the other buck converters have fully integrated pass devices, eliminating the need for external FETs or diodes. The device supports dynamic voltage control via I2C, over-current protection, and controlled soft start-up to limit inrush current. Design examples include regulating outputs at 5 V/20 A, 1 V/5 A, 1.5 V/2 A, and 3.3 V/2 A with detailed component selection guidelines for inductors, capacitors, and MOSFETs. The PV88080 operates from –40 °C to 85 °C in a 32-pin QFN package.
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- 应用说明英语PDF 267 KB 2021年2月12日AI 生成的摘要: IRQ line-sharing among multiple devices in Linux-based systems can cause unhandled interrupts, leading to kernel failures. When an IRQ remains unserviced, the Linux kernel disables the IRQ line, potentially affecting all devices sharing it. This behavior arises after a threshold of unhandled interrupts triggers a diagnostic message and disables the IRQ. Solutions include allocating dedicated IRQs, masking interrupts via OTP or bootloader, and managing driver installation order. Specific recommendations for PMIC devices like DA9210 and DA9063 address interrupt masks and fault log clearance to mitigate such issues.
- 应用说明英语PDF 873 KB 2021年2月12日AI 生成的摘要: Power rail sequencing uses 15 configurable time slots to control the power-up and power-down order of buck converters. Each buck converter is assigned a slot, with dummy slots inserted for delay adjustments. The STBY pin controls whether the system ends in standby or active mode by stopping the sequence at a defined slot. Delay times between slots can be fine-tuned using SEQ_TIME and SET_DUMMY parameters. For longer delays beyond 15 slots, the WAIT_ID function inserts additional wait time. Multiple PV88080 devices can be cascaded and controlled via GPIO and STBY pins.
- 应用说明英语PDF 696 KB 2021年2月12日AI 生成的摘要: Dynamic Voltage Control (DVC) adjusts power rail voltages dynamically based on processor load to optimize power consumption and performance. It increases voltage for higher processor speeds and decreases voltage to save power during low load. Traditional DVC uses resistor dividers and MOSFETs, requiring many components and large PCB area. The PV88080 simplifies this by enabling voltage adjustment via I2C register writes, reducing complexity and allowing programmable slew rates to minimize voltage overshoot and undershoot. The document details DVC settings for low voltage buck converters (LVBuck), including output voltage ranges and configuration via a graphical user interface.
- 应用说明英语PDF 529 KB 2018年4月24日AI 生成的摘要: Power Fail Detection and Audio Mute functions monitor the input voltage on the PV88080 and trigger an interrupt signal when preset thresholds are crossed. The Mute function uses four selectable voltage levels configured via OTP to mute audio output by controlling the amplifier's mute pin. Power Fail Detection employs an external resistive divider to set the comparator trip point, signaling the host processor to initiate system shutdown or mute audio. The mute trigger voltage is set above the Power-on Reset (POR) threshold, with a 200µs de-glitch delay to ensure stable recovery. OTP programming customizes these settings to fit specific applications.
- 应用说明英语PDF 586 KB 2018年4月24日AI 生成的摘要: Temperature sensing uses an NTC thermistor connected to the PV88080’s GPIO2 pin, which supplies a 10 µA current. The thermistor’s resistance decreases as temperature rises, causing the voltage at GPIO2 to drop below an internal 1.2 V reference. This triggers an alert via the nIRQ pin to notify the host processor of an over-temperature condition. The system can clear this alert through an I2C command, resetting the nIRQ signal. Design examples include calculating thermistor resistance and series resistor values to trigger alerts at specific temperatures, such as 100 °C. The document provides formulas and diagrams to assist in implementing reliable temperature monitoring on PCBs.查看更多 (7)
应用说明和白皮书 (7)
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