特性
- Tx/Rx
- Input/Output pins of the CAN module
- Protocol controller
- Handles CAN protocol processing such as bus arbitration, bit timing at transmission and reception, stuffing, error handling, etc.
- Acceptance Filter List RAM
- Performs filtering of received messages. The entries in the Acceptance Filter List RAM are used for the filtering process.
- Two timers
- Reception timestamp function
- Transmission separation time for First In, First Out (FIFO) buffers
- Message Buffer RAM interface
- This RAM interface is used to store messages after reception or for transmission using a normal message buffer or a FIFO buffer.
- Each message entry has an individual ID, data length code, data field, message pointer for an upper-layer application, and a timestamp.
- This RAM interface is also used to store the message acceptance filtering entries. Each acceptance filter entry has an individual ID, data length code, data field, message pointer for upper-layer application usage, and message direction pointer.
Single-Channel CAN FD Controller IP Block Diagram
描述
Renesas' Single-Channel CAN FD Controller IP is used to embed a single CAN channel. This CAN module can be configured to CAN FD or classic CAN and transmit and receive both message formats: the standard identifier (ID), which is 11 bits, and the 29-bit extended ID. This IP is compliant with ISO 11898-1 (2015) specifications.
产品参数
| 属性 | 值 |
|---|---|
| Protocol | CAN FD |
| Function | Controller |
| Process | Soft macro |
| Interface | AMBA® APB |
| Number of Channels | 1 |
