瑞萨电子 (Renesas Electronics Corporation)
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74FCT3807S

有效

Low Skew 1 to 10 Clock Buffer

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特性

  • Low additive phase jitter RMS: 50fs
  • Low skew outputs (50ps)
  • Packaged in 20-pin TSSOP, SSOP, QSOP, and QFN packages, Pb (lead) free
  • Operating voltages of 1.8V to 3.3V
  • Input/Output clock frequency up to 200MHz
  • Advanced, low-power CMOS process
  • Extended temperature range: -40 °C to +105 °C
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74FCT3807S Block Diagram
74FCT3807S Pinout - TSSOP, SSOP, QSOP
74FCT3807S Pinout - QFN
74FCT3807S Block Diagram
74FCT3807S Pinout - TSSOP, SSOP, QSOP
74FCT3807S Pinout - QFN

描述

The 74FCT3807S is a low skew, single input to ten output, LVCMOS clock buffer that offers a best-in-class additive phase jitter of sub 50fs.

产品参数

属性 值
Function Buffer
Outputs (#) 10
Output Type LVCMOS
Output Freq Range (MHz) -
Input Type LVCMOS
Output Banks (#) 1
Output Voltage (V) 1.8, 2.5, 3.3
Output Skew (ps) 65
Additive Phase Jitter Typ RMS (fs) 35

封装选项

Pkg. Type Pkg. Dimensions (mm) Lead Count (#) Pitch (mm)
QSOP 8.7 x 3.8 x 1.47 20 0.64
SSOP 7.2 x 5.3 x 1.73 20 0.65
TSSOP 6.5 x 4.4 x 1.0 20 0.65
VFQFPN 3.0 x 3.0 x 1.0 20 0.4

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This video overviews the LVCMOS Fanout Buffers, showcasing their best-in-class performance with extremely low phase jitter, minimal output skew, and low power consumption, along with other competitive features.

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