特性
- QML Class T, per MIL-PRF-38535
- Radiation performance
- Gamma dose 1 x 105 RAD(Si)
- No latch-up, SEU LET >100MeV/mg/cm2
- Transient output upset >5 x 108 RAD (Si)/s
- Fast access time - 35ns (Typical)
- Single 5V power supply, synchronous operation
- Single pulse 10V field programmable NiCr fuses
- On-chip address latches, three-state outputs
- Low standby current <500µA (Pre-Rad)
- Low operating current <15mA/MHz
- Electrically screened to SMD # 5962-95626
描述
The Intersil Satellite Applications Flow™ (SAF) devices are fully tested and guaranteed to 100kRAD total dose. These QML Class T devices are processed to a standard flow intended to meet the cost and shorter lead-time needs of large volume satellite manufacturers while maintaining a high level of reliability. The Intersil HS-6664RH-T is a radiation hardened 64K CMOS PROM, organized in an 8K word by 8-bit format. The chip is manufactured using a radiation hardened CMOS process and utilizes synchronous circuit design techniques to achieve high-speed performance with very low power dissipation. On-chip address latches are provided, allowing easy interfacing with microprocessors that use a multiplexed address/data bus structure. The output enable control simplifies system interfacing by allowing output data bus control in addition to the chip enable control. All bits are manufactured storing a logical 0 and can be selectively programmed for a logical 1 at any bit location.
| Part Number | Status | Samples | Stock | Package | Lead Count (#) | Carrier Type | Moisture Sensitivity Level (MSL) | Pitch (mm) | Pkg. Dimensions (mm) | DLA SMD | Pb (Lead) Free | Pb Free Category | MOQ | Temp. Range (°C) | CAGE code |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| HS1-6664RH-T | Obsolete | Available | Out of Stock | SBDIP | 28# | Tube | Not Applicable | 2.5mm | 35.6 x 15.1 x 2.41 | 5962R9562601TXC | Yes | Gold Plate over compliant Undercoat-e4 | 450 | -55 to +125°C | 34371 |
| HS9-6664RH-T | Obsolete | Available | Out of Stock | CFP | 28# | Tray | Not Applicable | 1.3mm | 18.3 x 12.7 x 0.00 | 5962R9562601TYC | Yes | Gold Plate over compliant Undercoat-e4 | 450 | -55 to +125°C | 34371 |
- 产品咨询英语PDF 499 KB PA11003 2011年1月05日
- 产品变更通告英语PDF 230 KB PCN10123 2010年12月06日
- 应用说明英语PDF 224 KB an9654 1999年5月05日AI 生成的摘要: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
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- 应用说明英语PDF 224 KB an9654 1999年5月05日AI 生成的摘要: The document explains the reliability and failure mechanisms of semiconductor parts, focusing on life testing and wearout. It discusses how switching states cause transient current pulses and hot carrier injection, which only occur briefly during switching. Life testing at elevated temperatures accelerates aging to remove infant mortality failures, improving reliability. The failure rate follows a bathtub curve with infant mortality, useful life, and wearout phases, modeled by lognormal and exponential distributions. The Arrhenius equation relates failure rates at different temperatures. Burn-in and life tests reduce early failures without harming intrinsic reliability.
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- 产品咨询英语PDF 499 KB PA11003 2011年1月05日
- 产品变更通告英语PDF 230 KB PCN10123 2010年12月06日
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