封装信息
| CAD 模型: | View CAD Model |
| Pkg. Type: | VFQFPN |
| Pkg. Code: | QV0040AA |
| Lead Count (#): | 40 |
| Pkg. Dimensions (mm): | 5.0 x 5.0 x 0.9 |
| Pitch (mm): | 0.4 |
环境和出口类别
| Moisture Sensitivity Level (MSL) | 1 |
| Pb (Lead) Free | Yes |
| ECCN (US) | |
| HTS (US) |
产品属性
| Pkg. Type | VFQFPN |
| Lead Count (#) | 40 |
| Carrier Type | Reel |
| Moisture Sensitivity Level (MSL) | 1 |
| Pkg. Dimensions (mm) | 5.0 x 5.0 x 0.9 |
| Qty. per Reel (#) | 4000 |
| Diff. Outputs | 9 |
| Input Type | LVCMOS, CML, LVDS, HCSL, LVPECL, Crystal |
| Outputs (#) | 18 |
| Package Area (mm²) | 25 |
| Qty. per Carrier (#) | 0 |
| Pb (Lead) Free | Yes |
| Pb Free Category | e3 Sn |
| Temp. Range (°C) | -40 to 105°C |
| Advanced Features | Spread Spectrum, Hitless Switching |
| App Jitter Compliance | PCIe Gen1, PCIe Gen2, PCIe Gen3, PCIe Gen4, PCIe Gen5, PCIe Gen6, PCIe Gen7 |
| Application | Switches, Routers, Synchronous Ethernet, Telecom, Jitter Attenuator for PHY or Switches |
| Architecture | Common, SRIS, SRNS |
| Core Voltage (V) | 1.8V, 2.5V, 3.3V |
| Country of Assembly | TAIWAN |
| Country of Wafer Fabrication | TAIWAN |
| Diff. Inputs | 2 |
| Diff. Output Signaling | LP-HCSL, LVDS, LVPECL, LVCMOS |
| Family Name | VersaClock® 8 |
| Fractional Output Dividers (#) | 3 |
| Function | Synthesizer/Jitter Attenuator |
| Input Freq (MHz) | 650, 150 |
| Inputs (#) | 2 |
| Length (mm) | 5 |
| MOQ | 4000 |
| Output Banks (#) | 6 |
| Output Freq Range (MHz) | 0.008 - 650 |
| Output Impedance | 34, 85, 100 |
| Output Type | LVDS, LP-HCSL, LVCMOS, LVPECL |
| Output Voltage (V) | 1.8V, 2.5V, 3.3V |
| Phase Jitter Typ RMS (fs) | 102 |
| Pitch (mm) | 0.4 |
| Product Category | VersaClock, Jitter Attenuators, Network Synchronization, PCI Express Clocks, Programmable Clocks |
| Prog. Clock | Yes |
| Prog. Interface | OTP, I2C, SPI, SMBUS, EEPROM |
| Reel Size (in) | 13 |
| Reference Output | No |
| Requires Terms and Conditions | Does not require acceptance of Terms and Conditions |
| Spread Spectrum | Yes |
| Supply Voltage (V) | 1.8 - 1.8, 2.5 - 2.5, 3.3 - 3.3 |
| Tape & Reel | Yes |
| Thickness (mm) | 0.9 |
| Width (mm) | 5 |
有关 RC313 的资源
描述
RC313xxA（RC31312A 和 RC31309A）是瑞萨电子 VersaClock® 8 可编程时钟发生器/抖动衰减器系列中的一款产品。 该器件由一个可编程分数-N DPLL 和一个模拟 PLL（APLL）组成，前者用于超低相位噪声时钟生成和抖动衰减，后者驱动三个独立的分数输出分频器（FOD），并在七个输出组中的每个组上分别驱动独立的 IOD。 该器件可同时为以太网和存储设备提供低相位抖动的非扩频时钟，以及扩频的 PCIe Gen7 时钟。
多达 18 种配置可在多个设计中重复使用，可储存在片上一次性可编程（OTP）储存器或外部 I2C EEPROM 中。 提供冗余输入以供备份，并在需要时用作参考时钟。
