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RZ/V2MA

有效

Vision AI MPU With Renesas DRP-AI High-efficiency AI Accelerator and OpenCV Image Processing Accelerator Enabling Real-time Object Recognition

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特性

  • CPU and DDR Memory Interfaces
    • 2x Cortex-A53 up to 1.0GHz
    • 32-bit LPDDR4-3200
  • Vision and Artificial Intelligence
    • AI Accelerator; DRP-AI at 1.0 TOPS/W class
    • OpenCV Accelerator (DRP)
  • Video and Graphics, Display
    • H.265/H.264 Multi Codec
      Encoding; h.265 up to 2160p, h.264 up to 1080p
      Decoding; h.265 up to 2160p, h.264 up to 1080p
  • High Speed Interfaces
    • 1x Gigabit Ethernet
    • 1x USB3.1 Gen1 Host/Peripheral
    • 1x PCIe Gen 2 (2-lane)
    • 2x SDIO 3.0
    • 1x eMMC 4.5.1
  • Package: FCBGA, 15x15mm 0.5mm pitch
  • Explore Renesas-validated DRAM Compatibility List
查找RZ 32 位和 64 位 MPU的其他产品
RZ/V2MA Block Diagram
RZ/V2MA Block Diagram

描述

DRP-AI utilizes an AI accelerator consisting of a Dynamically Reconfigurable Processor (DRP) and AI-MAC that accelerates AI inference to achieve both high-speed AI inference and low power consumption, enabling real-time image AI without heat sinks or cooling fans. In addition, the OpenCV accelerator, which takes advantage of DRP technology featuring high flexibility, enables high-speed image processing outside of AI in addition to image preprocessing for AI inference, all on a single chip.

These features enable smaller devices and lower BOM costs for vision AI applications in a wide range of embedded markets, including surveillance security, industrial automation, and healthcare.

Application Example Videos

产品参数

属性值
CPU ArchitectureArm
Main CPUCortex-A53 x 2
Program Memory (KB)0
RAM (KB)1200
Carrier TypeBulk (Tray), Full Carton (Tray)
Supply Voltage (V)3.135 - 3.465
I/O Ports177
NPUYes
DRAM I/FLPDDR4-3200 (32-bit)
3D GPUNo
Temp. Range (°C)Tj = -40 to +103
Operating Freq (Max) (MHz)996
Ethernet speed10M/100M/1G
Ethernet (ch)1
EtherCat (ch) (#)0
USB FS (host ch/device ch)( 1 / 1 )
USB HS (host ch/device ch)( 1 / 1 )
USB SS (host ch/device ch)( 1 / 1 )
PCI Express (generation and ch)PCIe (Gen.2.0 2Lane) x 1 ch
SCI or UART (ch)2
SPI (ch)0
I2C (#)4
CAN (ch)0
CAN-FD (ch)0
WirelessNo
SDHI (ch)2
High Resolution Output TimerNo
PWM Output (pin#)0
32-Bit Timer (ch)32
16-Bit Timer (ch) (#)0
8-Bit Timer (ch)0
Standby operable timerNo
Asynchronous General Purpose Timer / Interval Timer (ch)0
16-Bit A/D Converter (ch)0
14-Bit A/D Converter (ch)0
12-Bit A/D Converter (ch)0
10-Bit A/D Converter (ch)0
24-Bit Sigma-Delta A/D Converter (ch)0
16-Bit D/A Converter (ch)0
12-Bit D/A Converter (ch)0
10-Bit D/A Converter (ch) (#)0
8-Bit D/A Converter (ch)0
Capacitive Touch Sensing Unit (ch)0
Graphics LCD ControllerNo
MIPI Interfaces (DSI) (ch)0
MIPI Interfaces (CSI) (ch)0
Image CodecH.264/H.265
Segment LCD ControllerNo
Security & EncryptionNo

封装选项

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
FCBGA15 x 15 x 1.98410.5

应用方框图

Vision AI box block diagram features a high-performance AI MPU with optimized power management, expandable peripheral interfaces and various integrated communication modules.
视觉 AI 盒
作为集中控制枢纽，用于管理多路摄像头和 AI 模型。

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Part NumberStatusSamplesStockPackageBudgetary Price (USD)Carrier TypeFamily NameSeries NameGroup NameCPU ArchitectureMain CPUSub CPUFloating Point UnitBit LengthProgram Memory (KB)Data Flash (KB)RAM (KB)ECC SRAMLead Count (#)Pitch (mm)Pkg. Dimensions (mm)Number of Supply Voltage(s) (#)Supply Voltage (V)I/O PortsDMAC or DTCDMA (ch)Temperature Sensor (ch) (#)Power-On ResetWatchdog Timer (ch)External Memory Bus (bit)DRAM I/FNPU3D GPUAcceleratorMOQTemp. Range (°C)External Interrupt Pins (#)LVD or PVDOperating Freq (Max) (MHz)Sub-clock (32.768 kHz)On-chip OscillatorEthernet speedEthernet (ch)EtherCat (ch) (#)USB Ports (#)USB FS (host ch/device ch)USB HS (host ch/device ch)USB SS (host ch/device ch)PCI Express (generation and ch)SCI or UART (ch)SPI (ch)QSPI (ch)OSPI (ch)I2C (#)I3C (ch)CAN (ch)CAN-FD (ch)WirelessIrDALIN (#)SDHI (ch)High Resolution Output TimerPWM Output (pin#)32-Bit Timer (ch)16-Bit Timer (ch) (#)8-Bit Timer (ch)Standby operable timerAsynchronous General Purpose Timer / Interval Timer (ch)RTC16-Bit A/D Converter (ch)14-Bit A/D Converter (ch)12-Bit A/D Converter (ch)10-Bit A/D Converter (ch)24-Bit Sigma-Delta A/D Converter (ch)16-Bit D/A Converter (ch)12-Bit D/A Converter (ch)10-Bit D/A Converter (ch) (#)8-Bit D/A Converter (ch)Analog Comparator (ch)OPAMP (ch) (#)PGA (ch)Capacitive Touch Sensing Unit (ch)Graphics LCD ControllerMIPI Interfaces (DSI) (ch)MIPI Interfaces (CSI) (ch)Camera I/F (Parallel)Image Codec2D Drawing EngineSegment LCD ControllerSSI (ch)Security & EncryptionDebug InterfaceMoisture Sensitivity Level (MSL)Country of AssemblyCountry of Wafer Fabrication
R9A09G055MA3GBG#ACCActiveAvailableIn StockFBGA1ku | $32.64Bulk (Tray)RZRZ/VV2MAArmCortex-A53 x 2NoDouble/Single64001200KBYes841#0.5mm15 x 15 x 1.96#3.135 - 3.465177DMAC162#No232LPDDR4-3200 (32-bit)YesNoDRP-AI1Tj = -40 to +1038#No996MHzNoYes10M/100M/1G1ch01#( 1 / 1 )( 1 / 1 )( 1 / 1 )PCIe (Gen.2.0 2Lane) x 1 ch20004#000NoNo02No03200No0No0000000000000No00NoH.264/H.265NoNo0NoJTAG3TAIWANUSA
R9A09G055MA3GBG#BCCActiveAvailableOut of StockFBGA1ku | $32.64Full Carton (Tray)RZRZ/VV2MAArmCortex-A53 x 2NoDouble/Single64001200KBYes841#0.5mm15 x 15 x 1.96#3.135 - 3.465177DMAC162#No232LPDDR4-3200 (32-bit)YesNoDRP-AI1008Tj = -40 to +1038#No996MHzNoYes10M/100M/1G1ch01#( 1 / 1 )( 1 / 1 )( 1 / 1 )PCIe (Gen.2.0 2Lane) x 1 ch20004#000NoNo02No03200No0No0000000000000No00NoH.264/H.265NoNo0NoJTAG3TAIWANUSA

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加载中

筛选

    推荐文档 (4)

  1. 数据手册
    英语
    RZ/V2MA Datasheet
    RECOMMENDED
    PDF 1.02 MB R01DS0459EJ0100 Rev.1.00 2024年7月24日
  2. 手册 - 硬件
    英语
    RZ/V2MA User's Manual: Hardware
    RECOMMENDED
    PDF 15.48 MB R01UH0983EJ0120 Rev.1.20 2026年5月15日
    The RZ/V2MA group is an edge-oriented processor equipped with the DRP AI, which efficiently integrates AI processing and camera input, as well as image processing engines for non-AI tasks. This manual systematically organizes detailed technical information— including the DRP AI architecture, ISP, Arm cores, image input/output, peripheral circuits, and electrical characteristics— to provide developers with comprehensive resources required for designing edge AI systems.
  3. 应用说明
    英语
    RZ Family DRAM List
    RECOMMENDED
    PDF 423 KB R01AN7912EJ0104 Rev.1.04 2026年3月24日
    The DRAM list for RZ MPUs helps customers select suitable DRAMs from various options. “Recommendation” items are fully verified on real boards, while “Option” items are briefly verified via simulation to expand choices and reduce cost/TAT. Please verify compatibility with your design through SI/PI checks. Renesas does not guarantee these DRAMs will work with custom boards.
  4. 其他
    英语
    RZ/V2MA Easy Download Guide
    RECOMMENDED
    PDF 102 KB EPBZ-IMB-22-0267-6 日本語 2025年6月18日

    数据手册 (1)

  1. 数据手册
    英语
    RZ/V2MA Datasheet
    RECOMMENDED
    PDF 1.02 MB R01DS0459EJ0100 Rev.1.00 2024年7月24日

    手册和指南 (12)

  1. 手册 - 硬件
    英语
    RZ/V2MA User's Manual: Hardware
    RECOMMENDED
    PDF 15.48 MB R01UH0983EJ0120 Rev.1.20 2026年5月15日
    The RZ/V2MA group is an edge-oriented processor equipped with the DRP AI, which efficiently integrates AI processing and camera input, as well as image processing engines for non-AI tasks. This manual systematically organizes detailed technical information— including the DRP AI architecture, ISP, Arm cores, image input/output, peripheral circuits, and electrical characteristics— to provide developers with comprehensive resources required for designing edge AI systems.
  2. 手册 - 硬件
    英语
    [NDA Required] RZ/V2MA Users Manual: Hardware Additional Document
    登录后下载 PDF 21.5 MB R01UH0982EJ0120 Rev.1.20 2026年5月15日
    This document is the full version of the RZ/V2MA User's Manual: Hardware. An NDA is required in order to access this document.
  3. 指南
    英语
    RZ Family Product Part Number Guide
    PDF 941 KB EP1GP-AB-24-0001-1 2026年3月12日
  4. 指南
    英语
    RZ/V2MA Linux Start-up Guide Rev.1.22
    PDF 1.44 MB R01US0578EJ0122 Rev.1.22 2025年6月30日
    The RZ/V2MA Start-up Guide explains how to prepare and boot Linux on the RZ/V2MA MPU. It describes setup of the development environment, connection procedures, and system initialization, helping developers rapidly explore AI inference and imaging functions optimized for low-power embedded applications.
  5. 手册 - 软件
    英语
    RZ/V2M and RZ/V2MA Linux BSP Manual Set
    登录后下载 ZIP 6.91 MB 20240806-rs-RTK0EF0112Z9000AZJ-v1.4.1 2024年8月06日
    6. 查看更多 (12)

    应用说明和白皮书 (9)

  1. 应用说明
    英语
    RZ Family DRAM List
    RECOMMENDED
    PDF 423 KB R01AN7912EJ0104 Rev.1.04 2026年3月24日
    The DRAM list for RZ MPUs helps customers select suitable DRAMs from various options. “Recommendation” items are fully verified on real boards, while “Option” items are briefly verified via simulation to expand choices and reduce cost/TAT. Please verify compatibility with your design through SI/PI checks. Renesas does not guarantee these DRAMs will work with custom boards.
  2. 应用说明
    英语
    RZ/V2MA OpenCV Accelerator Sample Application Note 1.40
    PDF 196 KB R11AN0728EJ0140 Rev.1.40 2024年7月31日
    AI 生成的摘要: The OpenCV Accelerator Sample Application demonstrates executing various OpenCV functions on the RZ/V2MA platform with and without DRP acceleration. It covers image processing tasks such as resizing, color space conversion, filtering, morphological operations, edge detection, template matching, and geometric transformations using Full HD images. The sample application toggles DRP usage via the OCA_activate() function to compare CPU and DRP execution. Operating environment details, software setup, compilation steps, and related documents are provided to support development and evaluation.
  3. 应用说明
    英语
    RZ/V2MA DRP-AI Sample Application Note revision 7.50
    登录后下载 PDF 740 KB R11AN0593EJ0750 Rev.7.50 2024年7月31日
    AI 生成的摘要: The DRP-AI Sample Application for RZ/V2MA executes AI inference using DRP-AI Object files converted from ONNX models. It supports multiple input types, including image files and USB camera captures, and displays AI recognition results alongside USB images on an HTTP webpage. The application operates within a Linux environment on the RZ/V2MA platform, utilizing specific versions of Linux packages, video codec packages, DRP-AI drivers, and translators. The document details the processing flow, compilation, execution setup, and application contents such as supported AI models like Darknet YOLOv3 and TinyYOLOv2, MMPose HRNet, and PyTorch ResNet. It also covers USB camera HTTP version application structure, source code organization, and conditional compilation.
  4. 应用说明
    英语
    [NDA Required] RZ/V2MA High-Speed Interface PCB Design Guidelines
    登录后下载 PDF 846 KB R01AN6406EJ0200 Rev.2.00 日本語 2022年11月30日
    AI 生成的摘要: Provides detailed PCB design guidelines for high-speed interfaces of RZ/V2MA, focusing on USB 2.0, USB 3.1 Gen1, and PCI Express Gen1/Gen2. Emphasizes signal integrity through controlled impedance, matched trace lengths, minimal vias, and careful routing to avoid noise and EMI. Includes power supply and external component connection recommendations. Appendices list relevant high-speed signal pins, power supply pins, and external component connection pins. The guidelines ensure optimal performance and reliability of high-speed signals on PCBs.
  5. 应用说明
    英语
    RZ/V2MA DRP-AI Accuracy Report revision 7.20
    PDF 470 KB R11AN0628EJ0720 Rev.7.20 2022年9月29日
    AI 生成的摘要: The report evaluates the accuracy of DRP-AI on RZ/V2x series processors using ResNet and Tiny-YOLOv2 models. ResNet models (resnet18, resnet34, resnet50) achieve comparable TOP-1 and TOP-5 accuracy with DRP-AI (FP16) versus ONNX runtime (FP32). Tiny-YOLOv2’s mean average precision (mAP) on DRP-AI closely matches ONNX runtime, PyTorch, and Darknet implementations. Measurement conditions include pre-trained models, specific datasets, and preprocessing steps such as resizing and normalization. DRP-AI incorporates FP16 casting during preprocessing. The document provides detailed accuracy metrics and measurement setups for AI inference on embedded platforms.
    6. 查看更多 (9)

    勘误表和技术更新 (1)

  1. 技术更新
    英语
    System SRAM Exclusive Access issue
    PDF 313 KB TN-RZ*-A0155A/E 2026年4月28日

    原理图和设计文件 (1)

  1. PCB 设计文件
    英语
    [NDA Required] RZ/V2MA PCB Design Guide v1.1
    登录后下载 ZIP 3.49 MB 20230329-rs-RZV2MA_PCB_Design_Guide_v1.1 2023年3月29日

    营销资料 (2)

  1. 宣传手册
    英语
    RZ Family Brochure
    PDF 17.89 MB R01CP0031EJ1200 Rev.12.00 日本語 2025年10月01日
  2. 宣传手册
    英语
    Voice and Vision Development
    PDF 3.63 MB R19PM0004EU0100 Rev.1.00 2024年6月13日

    其他 (10)

  1. 其他
    英语
    RZ/V2MA Easy Download Guide
    RECOMMENDED
    PDF 102 KB EPBZ-IMB-22-0267-6 日本語 2025年6月18日
  2. 其他
    英语
    RZ/V2L, RZ/V2M, RZ/V2MA DRP-AI Performance Report revision 7.50
    登录后下载 PDF 445 KB R11AN0657EJ0750 Rev.7.50 2024年7月31日
  3. 其他
    英语
    RZ/V2L, RZ/V2M, RZ/V2MA AI Implementation Guide Appendix revision 7.50
    登录后下载 PDF 1.21 MB R11AN0622EJ0750 Rev.7.50 日本語 2024年7月31日
  4. 其他
    英语
    RZ/V2L, RZ/V2M, RZ/V2MA AI Implementation Guide PyTorch DeepLabV3 revision 7.50
    登录后下载 PDF 984 KB R11AN0619EJ0750 Rev.7.50 日本語 2024年7月31日
  5. 其他
    英语
    RZ/V2L, RZ/V2M, RZ/V2MA AI Implementation Guide Darknet YOLO revision 7.50
    登录后下载 PDF 1.44 MB R11AN0620EJ0750 Rev.7.50 日本語 2024年7月31日
    6. 查看更多 (10)

Renesas Boards & Kits

RZ/V2MA Evaluation Board Kit
RZ/V2MA-EVKIT 有效

RZ/V2MA Evaluation Board Kit

This product is an evaluation board with RZ/V2MA configured as the key device. The RZ/V2MA Evaluation Board Kit is configured with the main board, base board, and option board (sold separately). The option board is used for PCIe evaluation.

This product supports the RZ/V2MA standard software... 阅读详情

推荐文档：
RZ/V2MA Evaluation Kit Start-Up Guide
RZ/V2MA Linux Start-up Guide Rev.1.22

Partner Boards & Kits

AI Edge Gateway 11
Other

AI Edge Gateway 11

The AI edge gateway provides high-speed inference using DRP-AI and supports PoE-powered IP cameras, VMS-based video processing, local SSD recording, and LTE transmission of video and AI detection results. Low-heat AI processing enhances environmental robustness, with outdoor-ready models enabling stable edge AI operation in diverse locations. Free development support for building AI applications on Ubuntu is available.
Supported Products:
RZ/V2MA
Provided By:
amnimo Inc.
DRAM & Flash Memory Solutions
Complementary Silicon Devices

DRAM & Flash Memory Solutions

Provides a comprehensive external memory solution for Renesas RZ and R‑Car families, supporting systems that require scalable off‑chip memory. Supported memory types include Serial NAND (Quad/Octal SPI, 512Mb to 8Gb, 1.8V and 3.3V, 100K/60K cycle endurance), ONFI NAND (ONFI 1.0, 1Gb to 8Gb, 1.8V and 3.3V, 100K/60K cycle endurance), DRAM (DDR2/3/4 from 512Mb to 32Gb and LPDDR2/3/4/4x/5/5x from 1Gb to 16Gb), and HyperRAM™ (HyperBus, 64Mb to 512Mb, 1.8V and 1.2V).
Provided By:
Winbond Electronics Corp. Japan
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软件与工具

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模拟模型

Partner Solutions

    软件与工具 (17)

  1. 软件包
    英语
    DRP-AI Translator [V1.90]
    This is an AI model conversion tool (DRP-AI Translator) for DRP-AI equipped products. This product is also used as an internal tool for DRP-AI TVM (required when installing DRP-AI TVM).
  2. 软件包
    英语
    DRP-AI TVM (GitHub)
    We provide an AI model conversion tool (DRP-AI TVM) for DRP-AI-equipped products. When using this product, please check the contents of the linked README.md first.
  3. 软件包
    英语
    RZ MPU Video Codec Library for RZ/V2MA
    This product provides the Video Codec Library for RZ/V2MA. Please read the release note for Linux Package of the target devices before using this product.
  4. 软件包
    英语
    RZ/V Verified Linux Package [5.10-CIP]
    Linux packages for RZ/V2L, RZ/V2M, and RZ/V2MA MPUs. Functions of these products have been verified and regular maintenance is also provided.
  5. 软件包
    英语
    RZ/V2MA DRP-AI Support Package [V7.50]
    This product provides the software and documentation for DRP-AI embedded within RZ/V2MA.
    6. 查看更多 (17)

    模拟模型 (1)

  1. 模型 - 其他
    英语
    [NDA Required] RZ/V2MA PCB Design Simulation Data v1.0
    登录后下载 ZIP 35.97 MB 20220920-rs-RZV2MA_PCB_Design_Simulation_Data_v1.0 2022年9月15日

    Partner Solutions (69)

  1. software
    Development Tool
    中文
    Arm Cortex/RX Compatible Debugger: SEGGER J‑Link Series
    Supporting Arm® and RX microcontrollers, the SEGGER J-Link series is an industry-standard debugger for software development. High-speed programming algorithms reduce binary transfer time and accelerate development cycles. Broad compatibility supports Renesas e² studio, major IDEs, and RZ, RA, and RX devices. Advanced analysis with Ozone and ...
    提供方: EmbiTeK Co., Ltd.
  2. software
    Development Tool
    中文
    BPM Universal Device Programming Solutions
    Provides universal device programming systems combining algorithms, process-control software, and socket modules for Renesas microcontroller production. Enables high-volume programming across the RA, RX, RL78, RH850, RZ, R8C, V850, M16C, H8, H8SX, H8S, SH, 78K and Synergy families using 9th- and 10th-generation universal site technology. Supports new socket ...
    提供方: BPM Microsystems
  3. software
    Development Tool
    中文
    C/C++test
    All-in-one testing tool for C and C++ developed by Parasoft that supports static analysis, unit testing, coverage measurement, and runtime memory error detection. Supports coding enforcement based on standards such as MISRA, AUTOSAR, CERT, and CWE, and enables automatic coverage collection during unit testing and application execution. Includes ...
    提供方: TECHMATRIX CORPORATION
  4. software
    Development Tool
    中文
    C/C++test & C/C++test CT
    Provides tools for developing real‑time, safety‑ and security‑critical embedded software by combining static analysis, unit testing, code coverage, requirements traceability, and compliance reporting in a unified workflow. Supports a TÜV SÜD‑certified GoogleTest‑based unit testing solution and integrates with modern development toolchains and continuous integration and continuous ...
    提供方: PARASOFT
  5. software
    HMI
    中文
    Candera CGI Studio
    High-performance, scalable and hardware-independent HMI software toolchain for embedded systems. Enables development of customizable 2D and 3D graphical user interfaces with a designer-centric workflow, WYSIWYG editor, no-coding methodology and AI-assisted Smart Importer. Integrated state machine and automated workflows accelerate development. Scales efficiently from low-end ...
    提供方: Candera GmbH
    6. 查看更多 (69)
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Equipped with Renesas’ original DRP-AI Accelerator to deliver best-in-class thermal performance. In addition to delivering best-in-class thermal performance, easy-to-use evaluation board kit and software are available to shorten development time.

其他视频

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