概览
描述
The SLG46621 provides a small, low-power component for commonly used mixed-signal functions. The user creates their circuit design by programming the one-time programmable (OTP) non-volatile memory (NVM) to configure the interconnect logic, the I/O pins, and the macrocells of the SLG46621. This highly versatile device allows for a wide variety of mixed-signal functions to be designed within a very small, low-power single integrated circuit. The additional power supply (VDD2) on the SLG46621 provides the ability to interface two independent voltage domains within the same design. Users can configure pins, dedicated to each power supply, as inputs, outputs, or both (controlled dynamically by internal logic) to both VDD and VDD2 voltage domains. Using the available macrocells, designers can implement mixed-signal functions bridging both domains or simply pass through level translation in both High to Low and Low to High directions.
特性
- Logic and Mixed-Signal Circuits
- Highly Versatile Macrocells
- Read Back Protection (Read Lock)
- 1.8V (±5%) to 5V (±10%) VDD
- 1.8V (±5%) to 5V (±10%) VDD2 (VDD2 ≤ VDD)
- Operating Temperature Range: -40°C to 85°C
- RoHS-Compliant/Halogen-Free
- Macrocells Overview
- 8-bit Successive Approximation Register Analog-to-Digital Converter (SAR ADC)
- ADC 3-bit Programmable Gain Amplifier (PGA)
- Two Digital-to-Analog Converters (DAC)
- Six Analog Comparators (ACMP)
- Two Voltage References (Vref)
- Twenty-Five Combinatorial Look-Up Tables (LUTs)
- Eight 2-bit LUTs
- Sixteen 3-bit LUTs
- One 4-bit LUT
- One Combination Function Macrocells
- Pattern Generator or 4-bit LUT
- Three Digital Comparators/Pulse Width Modulators (DCMPs/PWMs) with Selectable Deadband
- Ten Counters/Delays (CNT/DLY)
- Two 14-bit Delay/Counter
- One 14-bit Delay/Counter (Wake-Sleep Control)
- One 14-bit Delay/Counter/Finite State Machine
- Five 8-bit Delay/Counter
- One 8-bit Delay/Counter/Finite State Machine
- Twelve D Flip-flops/Latches
- Two Pipe Delays - 16 Stage/2 Output
- Two Bandgaps
- Two Programmable Delays with Edge Detection
- Three Internal Oscillators
- Low Frequency
- Ring
- RC 25kHz and 2MHz
- Power-On Reset (POR)
- Slave SPI
