概览
描述
The ISL75055MEV1Z evaluation board features the ISL75055M 3A Source and Sink DDR Terminator/LDO. The board is designed for flexibility to evaluate the ISL75055M as a VTT termination rail in Double Data Rate (DDR) memory applications using a buffered reference to set VDDQ/2 as the voltage reference or as a standard LDO for general-purpose applications using the internal 0.5V voltage reference.
The ISL75055M is a radiation tolerant, low-dropout linear regulator designed for powering the VTT rail and VREF supply for DDR memories or as a general-purpose LDO. It is capable of sourcing and sinking 3A of current with 600µV of dead band crossover and has separate bias and LDO input rails to minimize internal losses while maintaining very accurate output regulation.
特性
- Configurable between DDR mode, using buffered reference, and LDO mode, using internal reference
- Onboard load transient generator
- 3A Source/Sink capability
- Adjustable output voltage, soft-start, output discharge, and overcurrent protection
