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概览

描述

The SLG47104 provides a small, low power component for commonly used mixed-signal and bridge functions. The user creates their circuit design by programming the one-time programmable (OTP) Non-Volatile Memory (NVM) to configure the interconnect logic, the IO pins, the high voltage pins, and the macrocells of the SLG47104. The configurable PWM macrocell in combination with special high voltage outputs will be useful for a motor drive or load drive applications. High voltage pins allow users to design smart level translators or to drive the high-voltage high-current load.

特性

  • Two Power Supply Inputs
    • 2.5V (±8 %) to 5.0V (±10 %) VDD
    • 3.3V (±9 %) to 12.0V (±10 %) VDD2
  • Two High Voltage High Current Drive GPOs
    • Full Bridge Driver Option
    • Dual/Single Half Bridge Driver Option
    • Slew Rate Modes: Motor Driver Mode, Pre-Driver (MOSFET Driver) Mode
    • SLEEP Function
    • Low RDS(ON) High Side + Low Side resistance = 0.4Ω
    • 2A Peak, 1.5A RMS per Full Bridge (at VDD2 = 5V, T = +25 °C)
    • 2A Peak, 1.5A RMS per Half Bridge GPO (at VDD2 = 5V, T = +25 °C)
    • Integrated Protections: Over Current Protection (OCP), Short Circuit Protection, Under-Voltage Lockout (UVLO), Thermal Shutdown (TSD)
    • SENSE Input connected to the Current Comparator for Current Control
    • Fault Signal Indicator for Full Bridge: OCP, UVLO, TSD
  • Current Sense Comparator
    • Dynamical VREF Mode
  • High-Speed General Purpose ACMP
    • Modes: UVLO, OCP, TSD, Voltage Monitor, Current Monitor
  • Voltage Reference (VREF) Output
  • Three Multi-Function Macrocells
    • 2× Selectable DFF/LATCH/3-bit LUTs + 8-bit Delay/Counters
    • 1× Selectable DFF/LATCH/4-bit LUT + 16-bit Delay/Counter
  • Nine Combination Function Macrocells
    • 2× Selectable DFF/LATCH or 2-bit LUTs
    • 1× Selectable Pattern Generator or 2-bit LUT
    • 3× Selectable DFF/LATCH or 3-bit LUTs
    • 1× Selectable DFF/LATCH or 3-bit LUT or PWM Chopper
    • 1× Selectable Pipe Delay or Ripple Counter or 3-bit LUT
    • 1× Selectable DFF/LATCH or 4-bit LUT
  • PWM Macrocell
    • Flexible 8-bit/7-bit PWM Mode with Duty Cycle Control
    • 16 Preset Duty Cycle Registers for Sine or Custom Waveforms
  • Serial Communications
    • I2C Protocol Interface
  • Additional Logic
    • Deglitch Filter with Edge Detectors
  • Oscillators (OSC)
    • 2.048kHz Oscillator
    • 25MHz Oscillator
  • Other Features
    • Power-On Reset (POR)
    • One-Time Programmable Memory
    • Operating Temperature: -40°C to +85°C
    • RoHS Compliant / Halogen-Free
  • Package
    • 20-pin STQFN: 2mm × 3mm × 0.55mm, 0.4mm pitch

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