概览
描述
The SLG46824 programmable mixed-signal matrix IC with in-system programmability provides a small, low-power component for commonly used mixed-signal functions. The user creates the circuit design by programming the multiple-time programmable non-volatile memory (NVM) to configure the interconnect logic, the IOs, and the macrocells of the SLG46824. This highly versatile device allows for a wide variety of mixed-signal functions to be designed within a very small, low-power, single integrated circuit.
特性
- In-System Programmability
- Multiple-Time Programmable Memory
- Wide Range Power Supply
- 2.5V (±8%) to 5V (±10%) VDD
- 1.8V (±5%) to 5V (±10%) VDD2 (VDD2 ≤ VDD)
- Operating Temperature Range: -40°C to 85°C
- RoHS-Compliant/Halogen-Free
- Macrocells Overview
- Two Low-Power General-Purpose Rail-to-Rail Analog Comparators (ACMPxL)
- One Voltage Reference (Vref)
- Eleven Combination Function Macrocells
- Three Selectable DFF/Latch or 2-bit LUTs
- One Selectable Programmable Pattern Generator or 2-bit LUT
- Six Selectable DFF/Latch or 3-bit LUTs
- One Selectable Pipe Delay or Ripple Counter or 3-bit LUT
- Eight Multi-Function Macrocells
- Seven Selectable DFF/Latch or 3-bit LUTs + 8-bit Delay/Counters
- One Selectable DFF/Latch or 4-bit LUT + 16-bit Delay/Counter
- Serial Communications: I2C Protocol Interface
- Programmable Delay with Edge Detector Output
- Deglitch Filter with Edge Detector
- Three Oscillators (OSC)
- 2.048kHz Oscillator
- 2.048MHz Oscillator
- 25MHz Oscillator
- Power-On Reset (POR)
产品对比
应用
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| 类型 | 文档标题 | 日期 |
| 数据手册 | PDF 2.40 MB | |
| 手册 - 开发工具 | PDF 570 KB | |
| 手册 - 开发工具 | PDF 435 KB | |
| 手册 - 开发工具 | PDF 200 KB | |
| 器件勘误表 | PDF 306 KB | |
| 应用说明 | PDF 512 KB | |
6 项目
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