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概览

描述

The SLG46140 is a one-time programmable (OTP) non-volatile memory (NVM) mixed-signal matrix designed to implement a wide variety of mixed-signal functions in a single, small, low-power device by integrating a number of common discrete ICs and passive components. In addition to the integrated analog and digital components, the SLG46140 comprises an internal connection matrix and one-time programmable NVM. By programming the NVM, using the easy-to-use GreenPAK development tools, the designer configures the connection matrix, I/O pins, and integrated components of the SLG46140.

特性

  • Logic and Mixed Signal Circuits
  • Highly Versatile Macrocells
  • 1.8V (±5%) to 5V (±10%) Supply
  • Operating Temperature Range: -40 °C to 85 °C
  • RoHS-Compliant/Halogen-Free
  • Pb-Free
  • Macrocells Overview
    • 8-bit Successive Approximation Register Analog-to-Digital Converter (SAR ADC)
    • ADC 3-bit Programmable Gain Amplifier (PGA)
    • Two Digital-to-Analog Converters (DAC)
    • Two Analog Comparators (ACMP)
    • Voltage Reference (Vref)
    • Eight Combinatorial Lookup Tables (LUTs)
      • Four 2-bit LUTs
      • Four 3-bit LUTs
    • Nine Combination Function Macrocells
      • One 14-bit Delay/Counter (Wake-Sleep Control)
      • Two Selectable DFF/Latch or 2-bit LUTs
      • Two Selectable DFF/Latch or 3-bit LUTs
      • One Selectable 16-Stage/3-Output Pipe Delay or 3-bit LUT
      • One 8-bit Delay/Counter/Finite State Machine
      • One 14-bit Delay/Counter/Finite State Machine
      • One Selectable Pattern Generator or 4-bit LUT
    • Three Digital Comparators/Pulse Width Modulators (DCMPs/PWMs) with Selectable Deadband
    • Three Counters/Delays (CNT/DLY)
      • One 14-bit Delay/Counter/Finite State Machine
      • One 14-bit Delay/Counter
      • One 8-bit Delay/Counter
    • Two D Flip-flops/Latches
    • Programmable Delay with Edge Detection
    • Three Internal Oscillators
      • Low-Frequency
      • Ring
      • RC 25kHz and 2MHz
    • Power-On Reset (POR)
    • Slave SPI
    • One Bandgap

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Diagram of ECAD Models

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类型 文档标题 日期
模型 - 其他 ZIP 9.81 MB
1 项目
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