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特性

  • Configurable OE pin function as OE, PD#, PPS, or DFC control function
  • Configurable PLL bandwidth/minimizes jitter peaking
  • PPS: Proactive Power Saving features save power during the end device power down mode
  • PPB: Performance Power Balancing feature allows minimum power consumption based on the required performance
  • DFC: Dynamic Frequency Control feature allows up to 4 different frequencies to switch dynamically
  • Spread spectrum clock support to lower system EMI
  • I2C interface
  • Also supports crystal input
  • Available in AEC-Q100 qualified, Grade 2 (-40 °C to +105 °C) version

描述

The 5P35021 is a VersaClock® programmable clock generator designed for low-power, consumer, and high-performance PCI Express applications. The 5P35021 device is a three-PLL architecture design, and each PLL is individually programmable allowing for up to five unique frequency outputs. The 5P35021 has built-in unique features such as Proactive Power Saving (PPS), Performance-Power Balancing (PPB), Overshoot Reduction Technology (ORT), and Extreme Low Power DCO. An internal OTP memory allows the user to store the configuration in the device without programming after powering up, and then program the 5P35021 again through the I2C interface.

The device has programmable VCO and PLL source selection to allow the user to do power-performance optimization based on the application requirements. It also supports one single-ended output and two pairs of differential outputs that support LVCMOS, LVPECL, LVDS, and LPHCSL. A low-power 32.768kHz clock is supported with only less than 5μA current consumption for the system RTC reference clock.

此为出厂可配置设备。
试用自定义部件配置工具

产品参数

属性
Diff. Outputs2
App Jitter CompliancePCIe Gen1, PCIe Gen2, PCIe Gen3
Outputs (#)5
Output TypeLVCMOS, LVPECL, LP-HCSL, LVDS
Output Freq Range (MHz)0.032768 - 500
Input Freq (MHz)1 - 160
Inputs (#)1
Input TypeCrystal, LVCMOS, LVPECL, LVDS, LP-HCSL
Output Banks (#)3
Core Voltage (V)3.3
Output Voltage (V)1.8V, 2.5V, 3.3V
Feedback InputNo
Product CategoryVersaClock 3S, Low Jitter Clocks (<700 fs RMS), Automotive Timing, General Purpose Clocks, PCI Express Clocks, Programmable Clocks
Selection Criteria<700 fs RM

封装选项

Pkg. TypePkg. Dimensions (mm)Lead Count (#)Pitch (mm)
VFQFPN3.0 x 3.0 x 1.0200.4

产品对比

5P350215P350235L350215L35023
Outputs (#)5757
Output TypeLP-HCSL, LVCMOS, LVDS, LVPECLLP-HCSL, LVCMOS, LVDS, LVPECLLP-HCSL, LVCMOSLP-HCSL, LVCMOS
Core Voltage (V)3.33.31.81.8
Output Voltage (V)1.8, 2.5, 3.31.8, 2.5, 3.31.81.8
Pkg. Dimensions (mm)3.0 x 3.0 x 1.04.0 x 4.0 x 0.93.0 x 3.0 x 1.04.0 x 4.0 x 0.9

应用方框图

Video Output Expansion for Surround View & AR-HUD Block Diagram
环视和 AR HUD 的视频输出扩展
集成视频输出和 AI 功能,用于环视系统和 AR HUD,有效降低成本和系统复杂度。
System on Module (SoM) Block Diagram
RZ/G2E 电源和时序系统级模块
电源和时序系统级模块(SoM)确保精确的时序和高效的功率分配。

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此为出厂可配置设备。
试用自定义部件配置工具
Part NumberStatusSamplesLongevityStockPackageBudgetary Price (USD)Lead Count (#)Carrier TypeMoisture Sensitivity Level (MSL)Qty. per Reel (#)Qty. per Carrier (#)Pb (Lead) FreePb Free CategoryTemp. Range (°C)Country of AssemblyCountry of Wafer Fabrication
5P35021-000NDG2ActiveAvailable2040 AprOut of StockVFQFPN20#Tray10624#Yese3 Sn-40 to 105°C
5P35021-000NDG28ActiveN/A2040 AprOut of StockVFQFPN20#Reel12500#0Yese3 Sn-40 to 105°C
5P35021B-000NDGIActiveAvailable2040 AprOut of StockVFQFPN1ku | $0.9820#Tray10624#Yese3 Sn-40 to 85°CTAIWANTAIWAN
5P35021B-000NDGI8ActiveAvailable2040 AprOut of StockVFQFPN1ku | $0.9820#Reel12500#0Yese3 Sn-40 to 85°CTAIWANTAIWAN
5P35021-000NDGIObsoleteN/A2040 AprOut of StockVFQFPN20#Tray10624#Yese3 Sn-40 to 85°C
5P35021-000NDGI8ObsoleteN/A2040 AprOut of StockVFQFPN20#Reel12500#0Yese3 Sn-40 to 85°C

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